Harris Corporation

Intersil Corporation

Stephen J Gaul

Jose Avelino Delgado

Craig J McLachlan

George V Rouse

Donald Frank Hemmenway

William R Young

Jack H Linn

Anthony L Rivoli

Patrick Anthony Begley

Chris A McCarty

Gregory A Schrantz

John T Gasner

Integrated circuit air bridge structures and methods of fabricating same

Conductive elements which provide interconnections (air bridges between circuits) and components such as capacitors and inductors may be incorporated in the devices in a manner to reduce parasitic effects in the operation of the devices while providing close spacing which enhances the performance of the devices at high frequency. Separate substrates are provided respectively having the integrated circuits formed therein and covering, preferably sealing the integrated circuits. The air bridge conductive components (interconnections, capacitors or inductors) are formed separately in the covering substrate which is assembled with the substrate having the integrated circuit as a lid which seals and packages the circuits and the conductive element or component contained in the lid. The conductive component may be separated by cavities formed in the lid substrate or in the substrate having the integrated circuit device already formed therein. Assembly may take place at temperatures lower than necessary for fusion bonding and diffusion commonly used in the fabrication of integrated circuits. Bonds which are used may be metal, oxide or plastic (polymer) bonding material.

A bonded wafer has a first handle wafer 12, a device layer 10', an interconnect layer 14, and a number of vias filled with conductive material that extends between the surfaces 6, 8 of the device layer 10'. the interconnect layer 14 has conductors that connect internal device contacts to the conductive vias. A second handle wafer 40 of glass is bonded to the interconnect layer 14 and the first handle wafer is removed. Bottom, external contacts 36 are formed on surface 6 of device layer 10'.

Surface mount die by handle replacement

A handle wafer has a cavity coated with a dielectric. A device wafer is bonded to the handle wafer. Metal lines, devices or circuits fabricated on device layer overlay the cavity in the handle wafer thus reducing parasitic capacitances to the handle wafer and crosstalk through the handle wafer. This constitutes a rugged air bridge structure capable of being passivated and/or being placed in plastic packages.

Pre-bond cavity air bridge

An air bridge structure 102 is formed in a cavity of a glass lid substrate. The air bridge structure is bonded to an integrated circuit in a device substrate 82 to provide an air bridge structure coupled to the integrated circuit.

Integrated circuit with an air bridge having a lid

A die 810 has an outer, annular via 814 filled with conductive material in order to electrically shield an inner via 816. A die 820 can be electrically shielded from another area 822 by use of a wall 823 having a trench with oxidized side walls and a conductive filling.

Intergrated circuit with coaxial isolation and method

In a sub-micron line width process, a first layer of polysilicon 13 is patterned into lines 1,2 spaced a predetermined distance. An oxide layer 11 is deposited. A second layer of polysilicon 14 is deposited on the insulating layer. A gate contact 19 or emitter contact 35 is formed from the second polysilicon layer 14. The gate 19 or emitter 35 is spaced from the lines 1,2 a distance approximately equal to the thickness of the second polysilicon layer 14.

Integrated circuit method for and structure with narrow line widths

In a microelectronic device formed on a substrate 12, a pair of trenches 30, 36 connected at their intersection by trench 54 which is disposed at an obtuse angle with respect to each of the pair of trenches 30 and 36.

Trench isolation stress relief

A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. the via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies 335a, 335b, 335c with conductive vias are stacked on top of each other. Other dies 341, 343 are connected together with an optical coupling die 342.

System for interconnecting stacked integrated circuits

A surface mountable integrated circuit is disclosed. Dies 1041 with edge connections 1080 are coupled to each other with the edge connection and to a printed circuit board 1070.

Integrated circuit with edge connections and method

A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. The via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.

Method of bonding wafers having vias including conductive material

Method of making integrated circuit structure with narrow line widths

Method of fabrication of surface mountable integrated circuits

A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. the via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.

Growing community of inventors

Melbourne, FL, United States of America

Stephen J Gaul