Freescale Semiconductor,inc.

Stephen J Benzel

Robert A McGowan

Robert N Ehrlich

Michael L Olivarez

A method and apparatus for an asynchronous multicore common debugging system is described. Debug signals from a plurality of processor cores are synchronized to a common timing domain. Processing completed within the plurality of processor cores during a common timing interval is tracked. A single debugging tool chain is utilized to provide debugging results in response to the tracking the processing completed within the plurality of processor cores during the common timing interval.

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Austin, TX, United States of America

Stephen J Benzel