Net Optics, Inc.

Finisar Corporation

Other

Juniper Networks, Inc.

Jds Uniphase Corporation

Aruba Networks, Inc.

Stephen H Strong

Eldad Matityahu

Robert E Shaw

Hogan Lew

Randy Ichiro Oyadomari

Xiaochun Liu

Bob Shaw

Ankur Singla

Tri Luong Nguyen

Dennis Carpio

Gururaj Govindasamy

Tor A Sundsbarm

Prakash Guda

George Anthony Bullis

Thien T Nguyen

Scott R Baxter

Doug Durham

Kai Liu

Ken Hornyak

According to one embodiment of the invention, a wireless network device comprises wireless logic and a heat dissipation unit that encases the wireless logic. The heat dissipation unit includes an antenna dome array that comprises a top surface having a convex-shaped outer periphery with a plurality of antenna elements positioned along the outer periphery.

Three dimensional antenna dome array

A network tap port aggregator for use in monitoring a network is provided. The network tap port aggregator includes a first device interface terminal for receiving a first network feed. The network tap port aggregator also includes a second device interface terminal for receiving a second network feed. The network tap port aggregator further includes a circuitry coupled with the first device interface terminal and with the second device interface terminal, the circuitry configured to monitor the first network feed and the second network feed and to aggregate the first network feed and the second network feed into an aggregated network feed. The network tap port aggregator yet also includes a first monitor interface terminal coupled to the circuitry for providing the aggregated network feed to a first network monitor that is external to the network tap port aggregator.

Intelligent communications network tap port aggregator and methods thereof

A network tap monitors network information flow over a particular connection. By duplicating the signal and diverting a copy, the information flow can be analyzed, both in real time and without interference through the monitoring process. When the power to the tap is either turned on or off, however, the change in impedance in the tap's circuit can create an interference spike in the connection that interrupts the information flow. By reducing or eliminating the impedance change in the tap circuitry, such disruptive interruptions can be eliminated.

Zero-interrupt network tap

An active response network tap for use in monitoring a network comprises a first device interface terminal, a second device interface terminal, a first monitor interface terminal, and a second monitor interface terminal. A tap structure is coupled to the first device interface terminal, second device interface terminal, first monitor interface terminal and second monitor interface terminal. A memory is coupled to the tap structure and configured to store data. In one aspect, the tap structure is configured to communicate full-duplex traffic between the tap structure and a monitor device coupled to a monitor interface terminal. In another aspect, the tap structure is configured to insert data from a monitor coupled to the first monitor interface into the traffic between the first device and the second device. Advantages of the invention include the ability to provide monitor access to a network while also supporting communication with other network devices.

Active response communications network tap

Protocol analyzers systems and methods coordinate the capture of network data of interest across multiple chassis. Each chassis has individual blades with accompanying ports and is serially connected to other chassis in the system. Selected ports from each chassis are configured in domains that can be spread across the serially connected chassis and used in coordination to capture network data of interest. A serial protocol containing control signals is used to transmit run, stop, and trigger data between the serially connected chassis and thereby coordinate the activity of ports within each domain. Through the use of the serial protocol the number of wires connecting adjacent chassis is minimized and each of the blades in the multi-chassis systems can be synchronously started, stopped, and triggered at the same time to synchronously capture the network data of interest.

Propagation of signals between devices for triggering capture of network data

A reversible fan tray device is provided for a power supply unit. The fan tray device includes a mounting panel to be removably mounted to the power supply, a fan unit secured to the mounting panel to provide airflow through the electronic device, and an interconnection board secured to the mounting panel to provide an electrical connection between the fan unit and the power supply unit. The mounting panel can be positioned in either of two orientations, the first orientation to draw external air into the power supply unit and the second orientation to force internal air out of the power supply unit. The interconnection board mates with a connector on the power supply unit when the fan tray cassette is in either of the two orientations. The interconnection board provides an airflow direction indication to the power supply unit for an existing orientation of the two orientations.

Power supply with reversible airflow design

Multi-chassis systems determine their topology and self-organize through a discovery process. The systems include one or more chassis, each with individual blades and ports, which are serially chained together. When the discovery process is initiated, chassis identification data in buffers in each chassis is propagated to adjacent chassis and is then used to initiate communication via a network connection. Once the chassis are able to communicate via the network connection, at least one chassis in the system receives the chassis identification data of each chassis and can thereby identify each chassis. The chain is then divided into one or more sync-groups and master and slave chassis are designated. Each sync-group is configured to ignore data from other sync-groups. Domains are also configured from sets of ports within each sync-group. Events that may trigger the discovery process include power-up, the connection of a cable, the removal of a cable, or instructions to transition from normal mode to discovery mode.

Discovery and self-organization of topology in multi-chassis systems

Intelligent network tap port aggregators for use in monitoring a network and methods for use therein are presented including: a number of device interface terminals for receiving network feeds; a tap structure coupled with device interface terminals, the tap structure configured to monitor the second network feeds and to aggregate the network feeds into an aggregated network feed; a monitor interface terminal coupled to the tap structure for providing the aggregated network feed to a network monitor; and a display coupled to the tap structure and configured to display selected network parameters corresponding to the network feeds. In some embodiments, the intelligent network tap port aggregator also includes: a network controller coupled with the tap structure for providing communication between the tap structure and a number of managing devices; and a managing device interface coupled with the network controller for providing Internet access to the network controller.

Intelligent communications network tap port aggregator

A communications network tap, comprises a first terminal and a second terminal adapted to couple the tap in-line in the network and communicate data packets with network devices. A heartbeat generator is configured to generate a heartbeat signal, and a heartbeat insert circuit coupled to the first terminal and the heartbeat generator and configured to insert the heartbeat signal into data packets. A third terminal is coupled to the heartbeat insert circuit and adapted to couple the tap to a network monitor and communicate data packets with network monitor. A heartbeat remove circuit is coupled to the third terminal and configured to receive data packets from a network monitor and remove the heartbeat signal from the data packets. A heartbeat detector coupled to the heartbeat remove circuit and configured to detect whether the data packets include the heartbeat signal, and if not, to generate an alarm signal. A switch is coupled to the second terminal and configured to transmit data packets onto the network. Advantages of the invention include ensuring the integrity of network monitoring equipment.

Communications network tap with heartbeat monitor

A communications network tap with a link fault detector, comprises a first terminal and a second terminal adapted to couple the tap in-line in the network and communicate data packets with network devices. A tap circuit is coupled to the first terminal and second terminal and configured to provide data packets to a monitor terminal. A link fault circuit coupled to the first terminal and second terminal and when a failure is detected in the first terminal, to cause a failure on the second terminal. Advantages of the invention include ensuring the integrity of the network by alerting network devices of fault conditions.

Communications network tap with link fault detector

Systems and methods for synchronizing time stamp counters of ports in a domain and for starting, stopping and triggering the ports in the domain at substantially the same time. A master box is connected with at least one slave box and the ports on the connected boxes are logically grouped in domains. The master box generates a clock signal that is adjusted and distributed to the slave boxes. The clock signal thus received by the slave boxes drives a clock multiplier that in turn drives the time stamp counters of the ports in the domains across the respective boxes. The time stamps of ports within a domain are synchronized because they are driven by the clock signal from the master box. The ports in a particular domain can be started, stopped and triggered using control signals that are similarly distributed from the master box to the slave boxes.

Systems and methods for synchronizing time stamps

A system for synchronizing data packet collection and transmission on multiple segments of a local area network (&ldquo;LAN&rdquo;) or a wide area network (&ldquo;WAN&rdquo;) using a common clock to generate time stamps placed on the data packets by all peripheral network devices. The common clock is located on a network analyzer device which acts as the &ldquo;master&rdquo; to other &ldquo;slave&rdquo; peripheral network devices which are driven by the common clock and coupled to the master device in a master-slave configuration. The system also synchronizes the initialization of data packet transmission and/or collection on multiple peripheral network devices by using a common industry standard architecture (&ldquo;ISA&rdquo;) address for all devices involved in the data transmission and/or collection.

Growing community of inventors

Fremont, CA, United States of America

Stephen H Strong