Motorola Corporation

Other

Si Diamond Technology, Inc.

Stephen H Kelley

Henry Wurzburg

Richard W Ulmer

Robert N Allgood

Mathew A Rybicki

Roger A Whatley

William J Donoghue

Claude Hilbert

John W Merritt

William Joseph Lillis

Noel M McCroskey

Robert C Baker

A system and method for producing uniform energy dissipation in display pixels with widely varying electrical characteristics in order to equalize light output and improve yield within a matrix addressable display panel. The present invention is implemented within a driver circuit utilizing the concept of current integration. A reference voltage, which is proportional to the most efficient pixel within the display is compared to the energy dissipated within a particular pixel during illumination of that pixel. A current mirror circuit supplies a current equivalent to the current provided to the object pixel to an integrator circuit resulting in a rising voltage within the integrator circuit. The rising voltage is proportional to the energy being dissipated within the current pixel. Once the rising voltage is equal to or greater than the reference voltage, current is removed from the object pixel.

System and method for achieving uniform screen brightness within a matrix display

A method of providing simultaneous voice and data communication for multiple ports in a digital line card of a PBX is provided. In one form, 64 K baud non-blocking voice communication for seven coupled ports and simultaneous 9.6 K baud user data communication for each port may be implemented in a single conventional line card. Voice and data bits are transmitted in frames comprising thirty-two time slots. Data bits from the various user ports are multiplexed into a single eight bit time slot. Voice bits for each port are transmitted in eight bit time slots. In one form, each time frame comprises four time slots for data and twenty-eight time slots for voice.

Method and apparatus for implementing a cost efficient voice/data

An N bit converter, where N is an integer, is provided for effecting A/D and D/A conversions by utilizing a capacitor array and a resistor voltage divider string. The converter may be linear or nonlinear and the structure remains monotonic independent of the accuracy of the converter. Although monotonic, device count is minimized and only 2.sup.(N/2) stages are required to implement an N bit linear converter. Reduction of the number of circuit elements is achieved, in part, by shared use of decode circuitry for the most significant and least significant bits of the N bits.

Monotonic A/D converter which minimizes circuitry for high order bit

A circuit which can selectively sample and hold two real time input voltages and provide an output voltage indicating the difference value of the input voltages is provided. A switched capacitor structure which provides no parasitic capacitance output error component when the two input voltages are substantially equal is used.

Switched capacitor precision difference amplifier

A multiplexed data communications modem providing high speed data communication via a single twisted pair of conductors having a distance up to two kilometers between a plurality of data terminals and remote communications equipment is provided. A burst mode ping-pong transmission scheme is utilized. A control portion selectively multiplexes data from each data terminal, and the variation of actual data rate of each data terminal has no effect on channel capacity of the other multiplexed data channels. A plurality of data interface circuits provides an asynchronous/synchronous interface between the multiplexed data terminals and a synchronous transceiver.

High speed limited distance multiplexed data communications modem using

A telephone which can receive and transmit voice and asynchronous data simultaneously is provided. A signalling circuit provides signals indicating the request for a communication link or requesting a communication link to a predetermined location. A transceiver circuit synchronously receives and transmits frames of digital data bits representing data, voice and signalling information. A voice digitizer circuit converts the received frames of digital bits to an analog output and converts a received voice signal to a digital voice output. An interface circuit is used to interface between an asynchronous data source and the synchronous transceiver circuit. The telephone is line powered by utilizing D.C. isolating transformers to power both voice and data circuitry.

Simultaneous voice and asynchronous data telephone

In a digital telephone system, a digital private automatic branch exchange (PABX) has a plurality of digital line cards for coupling the PABX to respective digital subscriber sets via subscriber lines. In each digital line card, a digital loop transceiver operates in a master mode to couple the digital data bus of the PABX to the subscriber line via a subscriber line interface circuit in response to control signals provided by the PABX on the control bus thereof. In each digital subscriber set, a digital loop transceiver operates in a slave mode to couple the subscriber set to the subscriber line via a subscriber line interface circuit and to provide the several control signals required by the other components thereof. The digital loop transceivers may provide communication on each of two communication channels, with the digital data words of the first channel being treated the same as the digital data words of the second channel. In each digital loop transceiver, a power up/ power down circuit powers down all circuitry associated with each digital loop transceiver except for enough circuitry to detect an incoming data burst. Power up of each digital loop transceiver is accomplished via a power control portion which controls a data transmission controller in response to a detect signal and a power enable signal. A data control portion controls the transmission of bursted data to guarantee the avoidance of data collisions in a two-wire full duplex communication system.

Digital loop transceiver having a power up/down circuit

A voltage compatible circuit for providing TTL and CMOS level inputs and/or outputs is provided. An input signal level detection portion generates either a CMOS or a TTL mode signal in response to a voltage level selection signal. One or more input buffers and/or output buffers is coupled to the CMOS and TTL mode signals. The input buffers are responsive to input signals within predetermined CMOS voltage levels in response to a voltage level signal having at least a predetermined value determined by the input signal level detection portion and within predetermined TTL voltage levels otherwise. The output buffers provide output signals within predetermined CMOS voltage levels in response to a voltage level signal having at least a predetermined value determined by the input signal level detection portion and within predetermined TTL voltage levels otherwise. A reference voltage portion and a bias generator portion are coupled to the input and output buffers to provide the predetermined voltage levels.

Circuit for interfacing with both TTL and CMOS voltage levels

In a digital telephone system, a digital private automatic branch exchange (PABX) has a plurality of digital line cards for coupling the PABX to respective digital subscriber sets via subscriber lines. In each digital line card, a digital loop transceiver operates in a master mode to couple the digital data bus of the PABX to the subscriber line via a subscriber line interface circuit in response to control signals provided by the PABX on the control bus thereof. In each digital subscriber set, a digital loop transceiver operates in a slave mode to couple the subscriber set to the subscriber line via a subscriber line interface circuit and to provide the several control signals required by the other components thereof. The digital loop transceivers provide communication on each of two communication channels, with the digital data words of the first channel being treated the same as the digital data words of the second channel.

Digital loop transceiver for interfacing a digital PABX to a digital

A precision gain AC coupled operational amplifier circuit utilizing an integrated resistor voltage divider network and switched capacitors is provided. Precise gain is obtained by the use of integrated capacitors, and a low frequency stabilizing pole in the order of 10 Hertz is created by proper selection of the ratio of the resistors in the divider network.

Precision gain AC coupled operational amplifier

An operational amplifier capable of selectively performing a variety of circuit functions is provided. A single operational amplifier utilizes switched capacitors for sampling and holding an input signal, for establishing a low frequency pole, for applying the sample to an output capacitance to charge the capacitance and for comparing the input signal with a reference. The multi-function circuit provides a large savings in circuit area and permits versatility of circuit applications. One embodiment of the invention is to utilize a companding DAC having a capacitor array which may be used as the output capacitance of the operational amplifier circuit. The DAC provided utilizes an R ladder DAC coupled directly to a C DAC and has a switching structure that is simpler than comparable prior art circuits. The DAC is asynchronous and has programmable A- and Mu-255 law PCM conversion capability. Coupled directly to the C DAC is an operational amplifier receive filter circuit which utilizes the C DAC as an input capacitor thereby eliminating the need for a buffer amplifier and allowing the DAC to be used for both analog to digital and digital to analog conversion.

Capacitive DAC to filter interface circuit

An operational amplifier capable of selectively performing a variety of circuit functions is provided. A single operational amplifier utilizes switched capacitors for sampling and holding an input signal, for establishing a low frequency pole, for applying the sample to an output capacitance to charge the capacitance and for comparing the input signal with a reference. The multi-function circuit provides a large savings in circuit area and permits versatility of circuit applications. One embodiment of the invention is to utilize a companding DAC having a capacitor array which may be used as the output capacitance of the operational amplifier circuit. The DAC provided utilizes an R ladder DAC coupled directly to a C DAC and has a switching structure that is simpler than comparable prior art circuits. The DAC is asynchronous and has programmable A-and Mu-255 law PCM conversion capability. Coupled directly to the C DAC is an operational amplifier receive filter circuit which utilizes the C DAC as an input capacitor thereby eliminating the need for a buffer amplifier and allowing the DAC to be used for both analog to digital and digital to analog conversion.

Digital to analog converter

Multiple function operational amplifier circuit

A temperature stable bandgap voltage reference source utilizing bipolar transistors biased at different emitter current densities is provided. Switched capacitors are used to input the V.sub.be and the .DELTA.V.sub.be of the transistors (PTC and NTC voltages, respectively,) into an operational amplifier to provide a reference voltage proportional to the sum of the PTC and NTC voltages. Proper selection of the ratio of the switched capacitors renders the reference voltage substantially independent of temperature. In a modified form of the reference, the reference amplifier is implemented by an auto-zeroed operational amplifier which uses switched capacitor techniques and an integrated capacitor to achieve the auto-zeroing function.

Auto-zeroing operational amplifier circuit

A sampled data system having improved (sin X)/X correction is provided. A modified switched capacitor filter is used as a receive filter. The switched capacitor filter is modified in a manner to provide a charge gain thereby avoiding the increase in thermal noise normally associated with voltage gain amplification. The modified switched capacitor filter does not impair the dynamic range of the system and can be made duty cycle independent by providing additional controllable switches to the filter.

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Austin, TX, United States of America

Stephen H Kelley