Intel Corporation

Other

Stephen H Hall, Jr

Khang Choong Yong

Michael W Leddige

Maynard C Falconer

Chaitanya Sreerama

Olufemi B Oluwafemi

Bok Eng Cheah

Jackson Chung Peng Kong

Howard L Heck

Bryce D Horine

Jason A Mix

Paul G Huray

Eng Huat Goh

Kooi Chi Ooi

Xiang Li

Tin Poay Chuah

Gary A Brist

Peter A Davison

Boon Ping Koh

Ranjul Balakrishnan

Murali Veeramoney

Kevin Joseph Doran

Vijay M Rao

Royce Fernald

Michael T White

Antonio Zenteno Ramirez

Teong Keat Beh

Earl J Wight

Jose A Sanchez Sanchez

Long Wang

Apparatus and methods employing twisted differential compensation for routing high-speed signals near power delivery inductors. Traces used for a high-speed differential signal including a P trace and an N trace are routed through one or more layers in a multi-layer printed circuit board (PCB) substrate and employ a twisted portion proximate to the centerline of an inductor under which portions of the P and N traces are swapped horizontally in a layer parallel to the top plane and/or are swapped vertically by swapping layers. The signal paths are routed such that a level of noise inductively coupled into the P trace and the N trace from the inductor is approximately equally. Stripline structures are used for signals that are routed under an inductor, while stripline and microstrip structures are used for signals routed adjacent to an inductor.

Twisted differential compensation for routing high-speed signals near power delivery inductors and system miniaturization

Three-dimensional (3-D) volumetric board architectural design provides technical solutions to technical problems facing miniaturization of circuit boards. The 3-D volumetric architecture includes using more of the unused volume in the vertical dimension (e.g., Z-dimension) to increase the utilization of the total circuit board volume. The 3-D volumetric architecture is realized by mounting components on a first PCB and on a second PCB, and inverting and suspending the second PCB above the first PCB. The use of 3-D volumetric board architectural design further enables formation of a shielded FEMIE, providing shielding and improved volumetric use with little or no reduction in system performance or increase in system Z-height.

Flexible printed circuit EMI enclosure

This disclosure is directed to a system to provide tactile feedback during non-contact interaction. A system may comprise at least display circuitry, sensing circuitry, tactile feedback circuitry and processing circuitry. The processing circuitry may cause the display circuitry to present a user interface. The sensing circuitry may sense when a body part of a user (e.g., a hand, a finger, etc.) is proximate to the user interface and may generate position data based on a sensed position of the body part. The processing circuitry may determine a relative position of the body part with respect to the user interface based on the position data, and may determine if the body part is interacting with the user interface based on the relative position. If it is determined that the body part is interacting with the user interface, the processing circuitry may cause the tactile feedback circuitry to generate directional feedback.

System to provide tactile feedback during non-contact interaction

Embodiments are generally directed to a mutual inductance suppressor for crosstalk immunity enhancement. An embodiment of a printed circuit board includes a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting; a second layer below the first layer, the second layer including a voltage reference plane; and a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace.

Mutual inductance suppressor for crosstalk immunity enhancement

An apparatus is described herein. The apparatus includes a plurality of conductors, wherein at least one conductor is a common-mode conductor. The apparatus also includes an encoder to encode data to be transmitted on the plurality of conductors, wherein a data speed of the common-mode conductor is limited and a data speed of other conductors is maximized according to an encoding matrix.

Mode selective balanced encoded interconnect

Techniques for decoding encoded data are described herein. An example of a device in accordance with the present techniques includes a receiving signaling module coupled to a plurality of signal lines. The signaling module includes a receiver to receive a plurality of encoded line voltages or currents on the plurality of signal lines of a bus, wherein each one of the plurality of encoded line voltages corresponds to a weighted sum of data. The signaling module includes a comparator to determine the voltage level of each line at a unit interval and convert the voltage level to a digital value. The signaling module includes a lookup table correlating the digital value with a digital bit stream.

Crosstalk aware decoding for a data bus

Some example forms relate to an electrical interconnect for an electronic package. The electrical interconnect includes a dielectric layer that includes a trench formed into one surface of the dielectric layer and a signal conductor that fills the trench and extends above the one surface of dielectric layer. The electrical interconnect further includes a conductive reference layer mounted on an opposing side of the dielectric layer. The conductive reference layer is electromagnetically coupled to the signal conductor when current passes through the signal conductor.

Electrical interconnect for an electronic package

Techniques and mechanisms for coupling a flexible circuit device to another device. In an embodiment, a substrate includes a first side and a second side opposite the first side, where first contacts of a hardware interface are disposed on the first side, and second contacts of the hardware interface are disposed on the second side. First interconnects and second interconnects variously extend in the substrate, where the first contacts are coupled via the first side each to a respective one of the first interconnects, and the second contacts are coupled via the second side each to a respective one of the second interconnects. In another embodiment, the substrate is one of a flexible substrate and a printed circuit board substrate, where the first interface is configured to couple the substrate, in an edge-to-edge configuration, with the other of a flexible substrate and a printed circuit board substrate.

Structures for edge-to-edge coupling with flexible circuitry

Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a plurality of digital inputs. The signaling module is to encode data received at the plurality of digital inputs to generate encoded data. Based on the encoded data, the signaling module can drive line voltages on a plurality of signal lines of a bus. Each one of the plurality of line voltages corresponds to a weighted sum of the data received at the plurality of digital inputs.

Crosstalk aware encoding for a data bus

In some embodiments an interconnect includes a waveguide and a transmission line coupled in parallel with the waveguide. Other embodiments are described and claimed.

Ultra-high bandwidth interconnect for data transmission

In some embodiments, an electronic device comprises a circuit board, an antenna structure on the circuit board, and a waveguide mounted on the circuit board above the antenna structure. Other embodiments may be described.

Modular waveguide inteconnect

A variable delay path circuit having delay paths of different lengths is disclosed. Any of the delay paths can be selected to match the operating conditions of the system. In one embodiment of the invention, a delay path circuit having two delay paths connects a driver and receiver. Each of the two delay paths contains sites at both ends for placing zero ohm resistors, solder or copper slugs. To select one of the two delay paths, zero ohm resistors, solder or copper slugs are placed in the sites at the ends of the desired delay path. The delay is then dictated by the time it takes for a clocking signal to travel the length of selected delay path.

Growing community of inventors

Forest Grove, OR, United States of America

Stephen H Hall, Jr