International Business Machines Corporation

Lucent Technologies Inc.

Stephen F Newton

Jonathan James Hurd

James O Groves, Jr

Randhir Singh Malik

Allen Frank Rozman

Christopher Dane Jones

Chi Shih Chang

Paul W Graf

Bruce M Cassidy

David R Thomas

Kenneth Andrew Wallace

Mark K DeMoor

Richard E Bruer

Robert J Huljak

John C Cassani

William S Blocher

A system supplies power to and controls the frequency of electronic circuitry. The system comprises a DC source for supplying power to the electronic circuitry and a voltage controlled oscillator powered by the DC source. An output of the oscillator provides a system clock for the electronic circuitry such that as a voltage of the DC source continuously drops, the operating voltage of the electronic circuitry and oscillator continuously drops and the frequency of the system clock continuously drops in a manner corresponding to the continuous drop in operating voltage. Thus, the oscillator supplies an operating frequency tailored to the operating voltage to permit the electronic circuitry to operate at high speed.

System for extending operating time of a battery-operated electronic

A power converter and a method of operating a power converter. The power converter includes: (1) a transformer for receiving bipolar electrical input power from a power source, the power substantially free of dead time and (2) a hybridge rectifier coupled to the transformer and including first and second output inductors of independently selectable, differing inductance, the hybridge rectifier receiving the input power from the transformer and rectifying the input power to produce an output power substantially free of ripple current at a predetermined duty cycle operating point of the converter, the first and second output inductors being of independently selectable, differing inductance thereby to allow the predetermined duty cycle operating point to be adjustable.

Circuit and method for achieving zero ripple current in the output of a

A circuit for providing an output current proportional to a first voltage raised to a fractional exponential power divided by a second voltage raised to a fractional exponential power, is supplied. The circuit has four strings of series connected pn junctions. The first and second voltages are connected to the first and fourth string, respectively. A reference current is provided to the second string, while the third string provides the output current. The number of pn junctions are chosen to give the desired fractional exponents of the two voltages while the number of pn junctions in the third string is selected to adjust for the number of pn junctions in the other strings.

Voltage ratio to current circuit

In critically continuous boost converters used to achieve high power factor and low input current harmonic distortion, a power FET is driven by a pulse generator whose on time is essentially constant over a single line cycle. Off time is terminated when current in the inductor falls to zero and the voltage on the side of the inductor not connected to the input voltage is less that the input voltage. A delay causes turn on to occur at the minimum of the voltage ring to minimize turn on switching losses. At voltages when the input voltage is less than one half of the output voltage part of the on time, turn on occurs with negative current flowing through the FET power switch and the inductor. Part of the turn on time is used to charge the inductor current back to zero before energy can begin to flow back into the output of the converter. A correction circuit is provided which extends the on time as a function of the input and output voltage to avoid dead time around the zero voltage crossover of the sinusoidal input voltage which when rectified provides the input voltage to the converter.

Critically continuous boost converter

A regulator circuit is provided that allows recovery in a controlled manner in the shortest possible time from occasional power line disturbances such as momentary line dropouts or under voltage. The voltage used to control switching of the switch mode converter follows the decrease in the output voltage during dropout, when switching of the switchmode converter ceases. When the line returns, the voltage used to control the switching is allowed to ramp up to the desired value providing a controlled recovery.

Dropout recovery circuit

A voltage regulating control loop for a boost converter having a gain stabilizing stage is provided. The gain stabilizing stage makes the open-loop AC gain independent of the DC output of the boost converter and of the root mean square value of the 50/60 Hz line input voltage. The gain stabilizing stage generates an error voltage that is proportional to the square root of a voltage that is a function of the DC output current divided by the root mean square value of the 50/60 Hz line voltage. The error voltage is compared to the integrated value of a signal inversely proportional to the error voltage to the on time of the power stage FET.

On time control and gain circuit

A latch (29) is set by a clock (33) to turn on power switch (FET 5). The latch (29) is reset by high voltage comparator (21), by a 50 percent clock delay (35) and by a low-voltage-to-charging-current comparator (19). The voltage at turn-on is compared with a up-ramping reference (15) until it equals an operating reference (17). A temporary delay (pulse circuit 39 and gate 37) is provided before the low voltage comparison can be effective. The delay prevents response to parasitic effects across the power switch (5). Excess drive is prevented resulting from low output currents and malfunctions, and at turn-on.

DC/DC converter

A DC to DC power converter having reduced switching loss for operation at high frequencies. As disclosed, a buck, or forward, converter includes a first FET as the switching device in series with an inductor and a second FET as the flywheel device. At the common node to which the two FET's and the inductor are connected, there is sufficient capacitance that the FET's may be turned off without appreciable voltage change across the FET's. The value of the inductor is chosen, with respect to the input and output voltages and frequencies of operation involved, to insure that the inductor current polarity reverses each cycle, raising the node voltage to the level of the input voltage, substantially eliminating turn-on losses of the first FET. Control circuitry is provided for regulation of the power converter to control the peak-to-peak current in the inductor and to insure that at least a selected minimum value of the inductor current is present for each cycle of operation of the converter. An over-voltage protection circuit for the output of the converter is also provided.

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Endicott, NY, United States of America

Stephen F Newton