Analog Devices International Unlimited Company

Analog Devices,inc.

Analog Devices Global

Analog Devices Global Unlimited Company

Stephen Denis Heffernan

David J Clarke

Patrick Martin McGuinness

Alan J O'Donnell

Edward John Coyne

David Aherne

Shaun Bradley

David M Boland

Nijun Wei

John Twomey

Javier Alejandro Salcedo

Gavin Patrick Cosgrave

Kieran K Heffernan

Juan Luo

Brian B Moane

Seamus Murnane

William Allan Lane

Donal McAuliffe

Seamus Paul Whiston

Brian Anthony Moane

Brian Sweeney

Alan J O'DONNELL

Patrick Mcguinness

Patrick M Mcguinness

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.

Wearable device with energy harvesting

Spark gap structures for detection and protection against electrical overstress events

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.

Electrical overstress detection device

A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.

Overvoltage protection device and method

Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.

Junction-isolated blocking voltage structures with integrated protection structures

Junction-isolated blocking voltage devices with integrated protection structures and methods of forming the same

Growing community of inventors

County Tipperary, Ireland

Stephen Denis Heffernan