International Business Machines Corporation

Stephen C West

James Mitchell Karp

Steven Ross Bentley

Sushama M Paranjape

Fernando Quintana

Charles E Bailey

Richard C Schneider

Steven W Roach

Gregory E McBride

William Frank Micka

Ernest Stewart Gale

David Michael Shackelford

Warren Keith Stanley

Lawrence Carter Blount

Vernon John Legvold

Ronald Maynard Kern

Jerry Wayne Pence

Robert Nelson Crockett

Scott Jeffrey Schaffer

Lyn Lequam Ashton

Anthony Steve Pearson

Gary W Callsen

Carl A Hassell

Emeline Yvonne Germain

Disclosed is a system, method, and program for limiting input/output (I/O) requests from an application program to a storage device to facilitate the processing of data in memory. A determination is made as to whether an amount of a set of data in memory exceeds at least one threshold. At least one of multiple paths to the storage device is indicated as blocked to I/O requests from the application program. Each indicated blocked path is available for processing the set of data in memory. An I/O request from the application program is received and a determination is made as to whether the received I/O request intends to access the storage device using one indicated blocked path. The I/O request is denied access to the storage device via the blocked path.

System, method, and program for managing I/O requests to a storage device

Disclosed is a system for managing pages in a volatile memory device for data transfer operations between a first storage area and a second storage area. The first storage area is queried to determine a number of data sets to include in a data transfer operation. A number of pages in the volatile memory device needed for the data transfer operation is then determined. A determination is then made as to whether the number of pages needed for the data transfer operation is greater than available fixed pages in a pool of pages. Available fixed pages in the pool are allocated to the data transfer operation after determining that the number of pages needed to process the data transfer operation is less than or equal to the available fixed pages in the pool. Alternatively, after determining that the number of pages needed to process the data transfer operation is greater than the available fixed pages in the pool, all the fixed pages in the pool and additional fixed pages are allocated to the data transfer operation.

Management of fixed pages in memory for input/output operations

A data processing system includes a data storage subsystem containing a plurality of data storage devices for reading and writing data on a plurality of data storage volumes. The data processing system is controlled by software to perform a method for recycling the data storage volumes containing a percentage of still valid data and a percentage of invalid data by transferring the still valid data on a plurality of input data storage volumes to one or more output data storage volumes. In accordance with the recycling method, the data processing system assigns a selected number of the data storage devices as input devices and a selected number of the data storage devices as output devices in a predetermined input/output ratio of the form m:k, where m is the number of input devices and k is the number of output devices. The system then commences transferring still valid data from input volumes mounted on the input devices to output volumes mounted on the output devices. As each volume is transferred, the system monitors the data transfer efficiency from the input devices to the output devices and adjusts the input/output ratio based on the measured data transfer efficiency.

Dynamic reconfiguration of data storage devices to balance recycle

An inexpensive, high performance error detecting and correcting system capable of handling multiple errors with high throughput. Digital data is provided to a reconfigurable decoder which is initially set for a low level of correction and a high throughput. On detection of an error, a signal is generated which is used to dynamically reconfigure the decoder. The decoder is reconfigured at a higher correction level. The data is then reprocessed through the reconfigured decoder. In a specific implementation, the invention uses a Blahut decoder. N and K values to reconfigure the decoder are provided by a microprocessor. The invention contemplates use of an encoder operating at the highest level of correction required. Use of an initial low level of correction provides for a high throughput. Reconfigurability allows for high corrective power and associated lower throughput only when necessary.

Method and system which selectively uses different levels of error

A method and apparatus which first calculates track to track skew in a tape device and then uses the results of that calculation to adjust the windows for detection of sync and resync characters. The system makes use of global circuitry which adjusts the sync and resync windows for all tracks based upon the skew calculation. In the case of the windows used for detecting resyncs, when skew is determined to be large, the global resync window must span a larger time period to account for the skew in detecting resync marks. Conversely, when there is little or no skew present, the windows for resync detection can be narrowed. Normally, the track logic utilizes its own local windows to detect resyncs. If a track misses a resync, however, it must use the global resync window to determine the next resync location. Once the tracks are resynchronized, control can return to local track circuitry to maintain synchronization. In the case of force windows used for detecting the syncs after a resync alignment burst, the skew calculation is used to determine the correct sync location for each particular track. Further, data alignment is maintained in the multitrack environment through the use of a deinterleaving circuit which receives misalignment indications and, in response, makes address corrections to data bytes and pointer bytes.

Synchronizing data tracks using global force windows and track sync

A method and system for accurately reading and storing data as multiple data blocks on a removable data storage medium mounted within a data storage system. Each data block includes an initial acquisition data character and multiple diverse synchronization characters/bursts and adjacent data blocks are separated by a unique interblock gap character. A multimodal interblock gap character detection circuit is provided which may operate in a normal mode of operation or a stringent mode of operation, wherein an enhanced degree of certainty is required for detection of the interblock gap character. A predicted time window of occurrence for a next interblock gap character is generated in response to detection of an initial acquisition data character and at least one synchronization character within a data block. Additionally, a global clock count signal based upon multiple track outputs is generated each time a resynchronization burst is encountered. The multimodal interblock gap character detection circuit is then automatically switched from the stringent mode of operation to the normal mode of operation during the predicted time window, minimizing the possibility of erroneous interblock gap character detection during data block processing. In data blocks which are sufficiently large to utilize multiple unique end of block synchronization characters, the occurrence of each successive end of block synchronization character may be utilized to redefine the predicted time window with greater accuracy. Expiration of a predicted time window or the occurrence of a global clock count signal during an open predicted time window may then be utilized to generate a presumption of the occurrence of an interblock gap character; however, actual detection of the interblock gap character will override the prediction circuitry.

Data storage system having multimodal interblock gap detection utilizing

A data storage system has error detecting and correcting system having three error codes. The data are arranged logically as a three-dimensional array consisting of a plurality of logically rectangular blocks of data. Each block of data has columns and rows of data. A first error code that corrects errors creates a first redundancy in each of the columns. A like-positioned block row of data in each of the blocks constitutes an array row of data. The array rows are grouped into sets of array rows, the number of array rows in each set vary inversely with a number of tracks of a record medium that concurrently receive the data for recording. Each set of data are recorded serially by bit in respective tracks of the tape record medium. Before recording, the block rows are logically rotated (end-around shifted) within each of the array rows. The block row shifting is different for each set such that the lateral alignment of data are changed for avoiding medium defects extending transversely of the tracks from creating excessive errors in any column of data. After the block row shifting, a second error code is applied to each block row while a third error code is applied to each array row. Readback is a reversal of the writing process. Error pointers are generated from the second and third redundancies as well as from signal and data format errors.

Error detection and correction having one data format recordable on

A method and apparatus which first calculates track to track skew in a tape device and then uses the results of that calculation to adjust the windows for detection of sync and resync characters. The system makes use of global circuitry which adjusts the sync and resync windows for all tracks based upon the skew calculation. In the case of the windows used for detecting resyncs, when skew is determined to be large, the global resync window must span a larger time period to account for the skew in detecting resync marks. Conversely, when there is little or no skew present, the windows for resync detection can be narrowed. Normally, the track logic utilizes its own local windows to detect resyncs. If a track misses a resync, however, it must use the global resync window to determined the next resync location. Once the tracks are resynchronized, control can return to local track circuitry to maintain synchronization. In the case of force windows used for detecting the syncs after a resync alignment burst, the skew calculation is used to determine the correct sync location for each particular track. Further, data alignment is maintained in the multitrack environment through the use of a deinterleaving circuit which receives misalignment indications and, in response, makes address corrections to data bytes and pointer bytes.

Method and apparatus for indicating when each track is in burst in a

Pointer control logic for error correcting codes includes a set of registers the contents of which are rotated whenever data from a track with a pointer are processed. In that manner, a given one register always contains pointer data for the track under consideration (if that track has a pointer). The pointer control logic includes programmable initializing values to stress write operations as desired. Further, the logic contains multiple and programmable pointer dropping thresholds so that pointer registers can be candidates for dropping dependent on the type of error encountered. Provision is made for extending pointer life when errors are encountered, registers are full, and no register has dropped below the pointer dropping threshold.

Optimized pointer control system

A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Resynchronization signals are interleaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed resynchronization signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the resynchronization signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronization controls are also disclosed.

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Tucson, AZ, United States of America

Stephen C West