Massana Research Limited

Agere Systems (ireland) Research Limited

Stephen Bates

Philip Curran

Carl Murray

Alberto Molina Navarro

Vincent Berg

Carl Damien Murray

A receiver () has an equalizer () which introduces inter symbol interferance (ISI) in a controlled manner and low pass filters to reduce noise. The ISI is introduced and the noise is reduced by a filter () in an adaptation path. A trellis decoder () of the receiver () removes the ISI to avoid propagation error. It does this in front end modules (), outside of its critical path. There is a better decoder performance because noise is smaller.

Data receiver

A Gigabit transceiver () has a receiver () and a transmitter (). There is an ADC () in the receiver () for each channel (A, B, C, D). The ADCs () oversample at a factor of 2. However the remainder of the digital circuitry and transmitter DACs () operate off half of the oversampling rate. In the receiver () fractionally spaced equalisers (FSES,) ensure that the optimum sampling phase is selected digitally. The invention avoids the need for a PLL in the receiver for each channel and associated interference and retiming problems.

Timing control in data receivers and transmitters

A data communication receiver comprises an equalizer for adapting to each of a plurality of channels to open the eye for each channel in a Gigabit (1000BASE-T) transceiver. The eye is open for a first channel (A) and a transformation process applies the coefficients of that adaptation to open the eye for the other dimensions. The transformation process keeps the magnitude response constant.

Growing community of inventors

Dublin, Ireland

Stephen Bates