Ciena Corporation

Stephen B Alexander

Steve W Chaddick

Cecil D Smith

Roy C Litz

Michael Y Frankel

Victor Mizrahi

David R Huber

Henry H Yaffe

Jean-Luc Archambault

David Jordan Krauss

Kaniz A Mahdi

John P Mateosky

Loudon Thomas Blair

Nigel Robert Davis

Sergio Slobodrian

Robert Corwin

Donald T Newman

John L Shanton, Iii

Mahdi Hirab

An optical transceiver includes an electro-optic front end; a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC) connected to the electro-optic front end; and one or more Field Programmable Gate Arrays (FPGAs) connected to the DAC and the ADC, wherein the one or more FPGAs are connected to one or more of a local memory and a remote storage for loading FPGA bit files, and wherein the one or more FPGAs are loaded with a forward error correction (FEC) encoding app and a FEC decoding app. The FEC encoding app and the FEC decoding app can be selected based on any of an optical application and a standard compliance requirement.

Software programmable flexible and dynamic optical transceivers

An electrical circuit package includes an electrical processing engine circuit configured to perform data processing; and one or more co-packaged coherent optical Input/Output (IO) modules interconnected to the electrical processing engine circuit, wherein the electrical processing engine circuit is configured to interface electrical data including an optical signal waveform representation to each of the one or more co-packaged coherent optical IO modules, and wherein the one or more co-packaged coherent optical IO modules are configured to coherently transmit and receive optical data based on the optical signal waveform representation. The electrical processing engine circuit can be configured to perform optical modulation and demodulation based on the optical signal waveform representation, in addition to the data processing.

Optical interconnects for a programmable virtualized self-optimizing signal processor

A storage system includes a connection to one or more optical transceivers, each having one or more Field Programmable Gate Arrays (FPGAs); and a processor and memory storing instructions that, when executed, cause the processor to receive a request for one or more applications for a specific optical transceiver of the one or more optical transceivers, and provide the one or more applications to the specific optical transceiver, wherein the one or more applications are utilized in the specific optical transceiver to dynamically configure digital functionality in its one or more FPGAs for operation in an optical network.

A controller associated with a domain includes a network interface; one or more processors communicatively coupled to the network interface; and memory storing instructions that, when executed, cause the one or more processors to communicate with one or more additional controllers via the network interface, wherein each of the one or more additional controllers is in one or more additional domains, and wherein each domain provides different characteristics, utilize at least part of a control pattern to obtain requirements for a service, and cause, utilizing any of a peer relationship and a hierarchical relationship with the one or more additional controllers, at least part of implementation of a composition of resources to meet the requirements for the service, wherein the composition defines the resources provided in each domain for the service, and wherein the composition is based on the requirements and the different characteristics in each domain.

Self-optimizing fabric architecture and self-assembling network

A software programmable optical transceiver includes one or more Field Programmable Gate Arrays (FPGAs); and an electro-optical front end communicatively coupled to the one or more FPGAs, wherein the electro-optical front end comprises a transmitter and a receiver, wherein the transmitter is adapted to transmit a transmit signal from the one or more FPGAs and the receiver is adapted to receive a receive signal and provide to the one or more FPGAs, wherein one or more applications are utilized to dynamically configure the one or more FPGAs for digital functionality to operate the software programmable optical transceiver in an associated mode. The one or more applications are loaded as needed to configure the software programmable optical transceiver in the associated mode, without requiring pre-programmed hardware in the software programmable optical transceiver for operation in a plurality of operating modes.

A network element, configured to operate in a network to provide various network functions therein, includes a main processor communicatively coupled to a main memory, wherein the main processor is configured to perform Operations, Administration, Maintenance, and Provisioning (OAM&P) associated with the network element, wherein the main processor is accessible through one or more access techniques; and a supervisory plane comprising a secure processor and a secure memory communicatively coupled thereto, wherein the supervisory plane is separate from and communicatively coupled to the main processor and the main memory, the supervisory plane is configured to allow secure, direct access to the main processor and the main memory.

Secure access systems and methods to network elements operating in a network

The present disclosure provides high-speed wavelength division multiplexing (WDM) transponders (e.g., 10 Gb/s, 40 Gb/s, 100 Gb/s, and beyond) that receive one or more optical signals and convert and/or remodulate the received optical signals onto a newly generated optical channel along with overhead processing/addition, forward error correction, and the like. In general, the transponders of the present invention include a client-side and a line-side, each with bi-directional optical transmission. The transponders provide an effective mechanism to support WDM networks that are transparent to the client-side.

High-speed optical transponder systems

The present invention provides a serializer/deserializer (SERDES) circuit that can cover both client- and network-side interfaces for high-speed data rates. The present invention leverages commonality between the client and network (also known as line) side, and accommodates differences in a flexible manner. In one exemplary embodiment, the present invention provides a four-channel implementation to meet the requirement of both interfaces. The SERDES circuit can be capable of supporting both 40 Gb/s and 56 Gb/s data rates, can include an integrated DQPSK pre-coder and I/Q input/output signals, and can support RZ clock recovery. Additionally, the SERDES circuit can include differential coding support, electronic pre-emphasis, receiver-side electronic dispersion compensation, and the like.

Serializer-deserializer circuit with multi-format and multi-data rate capability

The present invention provides a remodulating channel selector for a wavelength division multiplexed optical communication system. The remodulating selector receives a WDM input signal, selects a particular optical channel from the WDM signal and places the information from the selected signal onto a newly-generated optical output signal. The wavelength of the output optical signal can be the same as or different from one of the optical channels which comprises the WDM input signal. When used in a WDM optical communication system with remodulators at the transmission input, the remodulating selectors provide complete control over the interfaces with optical transmitters and receivers, permitting use with a broad range of optical equipment.

Remodulating channel selectors for WDM optical communication systems

In accordance with the present invention, optical channels to be demultiplexed are supplied to first and second optical fibers via an optical splitter. Low loss interference filters, for example, coupled to the first and second optical fibers, select respective groups of channels. Each group of channels is next demultiplexed with sub-demultiplexers into individual channels, each of which is then sensed with a corresponding photodetector. Although the optical splitter introduces an optical power loss at the input to the demultiplexer, the interference filters and sub-demultiplexers create little additional loss. As a result, the total power loss associated with the present invention is significantly less than that obtained with a conventional n channel demultiplexer based on a 1&times;n splitter. Accordingly, large numbers of channels, e.g., in excess of forty can be readily demultiplexed and detected.

Dense WDM optical multiplexer and demultiplexer

The present invention provides a system and method for intelligently shutting down an optical energy source in a communication system having optical amplifiers upon detection of a system failure.

System and method for shutting off an optical energy source in a communication system having optical amplifiers

In accordance with the present invention, optical channels to be demultiplexed are supplied to first and second fibers via an optical splitter. Low loss interference filters, for example, coupled to the first and second optical fibers, select respective groups of channels. Each group of channels is next demultiplexed with sub-demultiplexers into individual channels, each of which is then sensed with a corresponding photodetector. Although the optical splitter introduces an optical power loss at the input to the demutiplexer, the interference filters and sub-demultiplexer create little additional loss. As a result, the total power loss associated with the present invention is significantly less than that obtained with a conventional n channel demultiplexer based on a 1&times;n splitter. Accordingly, large numbers of channels, e. g., in excess of forty can be readily demultiplexed and detected.

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Annapolis, MD, United States of America

Stephen B Alexander