Qualcomm Incorporated

Stephen A Molloy

Dexter Tamio Chun

Victor Adrian Chiriac

Suresh Devalapalli

Nidish Ramachandra Kamath

Raghavendra Nagaraj

Samir Kumar Gupta

Prajakt Kulkarni

Jon James Anderson

Yun Du

Chun Yu

Guofang Jiao

Eddie L T Choy

Boris Andreev

Jeffrey Gemar

Tauseef Kazi

Jorge Luis Rosales

Vinod Chamarty

Aravind Bhaskara

Olivier Alavoine

Simon Booth

Tao Shen

Edoardo Regini

Renatas Jakushokas

Wenbiao Wang

Sejoong Lee

Saurabh Patodia

Jung Pill Kim

Jungwon Suh

Khaled Helmi El-Maleh

Joseph Cheung

Narendranath Malayath

Serag Gadelrab

Thomas Zeng

Haw-Jing Lo

De Dzwo Hsu

James H Thompson

Michael Hawjing Lo

Yi Liang

Youmin Yu

Allister Alemania

Yong Chang

Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Forced idling of memory subsystems

A device that includes a region comprising an integrated device, and a heat dissipating device coupled to the region comprising the integrated device. The heat dissipating device is configured to dissipate heat away from the region. The heat dissipating device includes a fluid, an evaporator configured to evaporate the fluid, a condenser configured to condense the fluid, an inner wall coupled to the evaporator and the condenser, an outer shell encapsulating the fluid, the evaporator, the condenser and the inner wall, an evaporation portion configured to channel an evaporated fluid from the evaporator to the condenser, wherein the evaporation portion is at least partially defined by the inner wall, and a collection portion configured to channel a condensed fluid from the condenser to the evaporator, wherein the collection portion is at least partially defined by the inner wall. The heat dissipating device may be a multi-phase heat dissipating device.

Multi-phase heat dissipating device for an electronic device

A device that includes a region comprising an integrated device and a heat dissipating device coupled to the region comprising the integrated device. The heat dissipating device is configured to dissipate heat away from the region. The heat dissipating device includes a fluid, an evaporator configured to evaporate the fluid, a first condenser configured to condense the fluid, where the first condenser is located in a first wall of the device, an evaporation portion coupled to the evaporator and the first condenser, and a collection portion coupled to the first condenser and the evaporator. The evaporation portion is configured to channel an evaporated fluid from the evaporator to the first condenser. The collection portion is configured to channel a condensed fluid from the first condenser to the evaporator through the help of gravity.

Multi-phase heat dissipating device embedded in an electronic device

The disclosure relates to systems, methods and apparatus to convert speech to text and vice versa. One apparatus comprises a vocoder, a speech to text conversion engine, a text to speech conversion engine, and a user interface. The vocoder is operable to convert speech signals into packets and convert packets into speech signals. The speech to text conversion engine is operable to convert speech to text. The text to speech conversion engine is operable to convert text to speech. The user interface is operable to receive a user selection of a mode from among a plurality of modes, wherein a first mode enables the speech to text conversion engine, a second mode enables the text to speech conversion engine, and a third mode enables the speech to text conversion engine and the text to speech conversion engine.

Voice and text communication system, method and apparatus

Systems, methods, and computer programs are disclosed for providing non-volatile system memory with volatile memory program caching. One such method comprises storing an executable program in a non-volatile random access memory. In response to an initial launch of the executable program, the executable program is loaded from the non-volatile random access memory into a volatile memory cache for execution. In response to an initial suspension of the executable program, cache pages corresponding to the executable program are flushed into the non-volatile random access memory.

Non-volatile random access system memory with DRAM program caching

Systems, methods, and computer programs are disclosed for allocating memory in a portable computing device having a non-uniform memory architecture. One embodiment of a method comprises: receiving from a process executing on a first system on chip (SoC) a request for a virtual memory page, the first SoC electrically coupled to a second SoC via an interchip interface, the first SoC electrically coupled to a first local volatile memory device via a first high-performance bus and the second SoC electrically coupled to a second local volatile memory device via a second high-performance bus; determining a free physical page pair comprising a same physical address available on the first and second local volatile memory devices; and mapping the free physical page pair to a single virtual page address.

Systems and methods for providing improved latency in a non-uniform memory architecture

Systems, methods, and computer programs are disclosed for allocating memory in a portable computing device having a non-uniform memory architecture. One embodiment of a method comprises: receiving from a process executing on a first system on chip (SoC) a request for a virtual memory page, the first SoC electrically coupled to a second SoC via an interchip interface, the first SoC electrically coupled to a first local volatile memory device via a first high-performance bus and the second SoC electrically coupled to a second local volatile memory device via a second high-performance bus; determining whether a number of available physical pages on the first and second local volatile memory devices exceeds a minimum threshold for initiating replication of memory data between the first and second local volatile memory devices; and if the minimum threshold is exceeded, allocating a first physical address on the first local volatile memory device and a second physical address on the second local volatile memory device to a single virtual page address.

Some implementations provide a multi-layer heat dissipating device that includes a first heat spreader layer, a first support structure, and a second heat spreader layer. The first heat spreader layer includes a first spreader surface and a second spreader surface. The first support structure includes a first support surface and a second support surface. The first support surface of the first support structure is coupled to the second spreader surface of the first heat spreader. The second heat spreader layer includes a third spreader surface and a fourth spreader surface. The third spreader surface of the second heat spreader layer is coupled to the second support surface of the first support structure. In some implementations, the first support structure is a thermally conductive adhesive layer. In some implementations, the first heat spreader layer has a first thermal conductivity, and the first support structure has a second thermal conductivity.

Multi-layer heat dissipating apparatus for an electronic device

In a particular embodiment, a device includes memory address remapping circuitry and a remapping engine. The memory address remapping circuitry includes a comparison circuit to compare a received memory address to one or more remapped addresses. The memory address remapping circuitry also includes a selection circuit responsive to the comparison circuit to output a physical address. The physical address corresponds to a location in a random-access memory (RAM). The remapping engine is configured to update the one or more remapped addresses to include a particular address in response to detecting that a number of occurrences of errors at a particular location satisfies a threshold.

Methods and apparatuses for in-system field repair and recovery from memory failures

A system and method for intelligent decoded picture buffering is described. In one embodiment, a video bitstream buffer receives and temporarily holds an encoded compressed bitstream containing portions of a video. Then, a look ahead parser scans ahead in the video to analyze portions of the encoded video bitstream in the video bitstream buffer to predict the value of the video. Based on this prediction, an intelligent memory manager prioritizes the video portions, and then sends the high valued video portions to a first buffer and sends the low valued video portions to a second buffer.

Intelligent decoded picture buffering

Electronic devices incorporating a heat dissipation feature include an enclosure, and at least one heat-generating component positioned within the enclosure. The heat dissipation feature is sufficiently coupled to the at least one heat-generating component to facilitate conductive heat transfer from the heat-generating component. The heat dissipation feature includes a plurality of protrusions exposed externally to the enclosure. A thermally insulating material may be disposed on at least a tip portion of at least some of the protrusions. The thermally insulating material is selected to provide a touch temperature that is below a predetermined threshold. In some instances, the thermally insulating material can provide such a touch temperature by selecting the material to include properties for thermal conductivity (k), density (&#x3c1;), and specific heat (C) such that the product of k*&#x3c1;*Cresults in a value less than a product of k*&#x3c1;*Cfor human skin.

Heat dissipation features, electronic devices incorporating heat dissipation features, and methods of making heat dissipation features

Systems and methods are provided for managing performance of a computing device having dissimilar memory types. An exemplary embodiment comprises a method for interleaving dissimilar memory devices. The method involves determining an interleave bandwidth ratio comprising a ratio of bandwidths for two or more dissimilar memory devices. The dissimilar memory devices are interleaved according to the interleave bandwidth ratio. Memory address requests are distributed from one or more processing units to the dissimilar memory devices according to the interleave bandwidth ratio.

System and method for managing performance of a computing device having dissimilar memory types

In a video decoding system, a method and system for decoding previously encoded frames of video into a compressed and uncompressed format. The uncompressed format frames may be further stored and utilized to decode additional frames of video. The compressed format frames may be further stored and provided to a display processor to be rendered with additional textures.

Texture compression in a video decoder for efficient 2D-3D rendering

This disclosure describes efficient transformation techniques that can be used in video coding. In particular, intermediate results of computations associated with transformation of a first block of video data are reused in the transformation of a second block of video data. The techniques may be used during a motion estimation process in which video blocks of a search space are transformed, but this disclosure is not necessarily limited in this respect. Pipelining techniques may be used to accelerate the efficient transformation techniques, and transposition memories can be implemented to facilitate efficient pipelining.

Efficient transformation techniques for video coding

Growing community of inventors

San Diego, CA, United States of America

Stephen A Molloy