Hitachi, Ltd.

Stephane Rossignol

Lew Chua-Eoan

Jeffrey Cui

A method and apparatus is disclosed for manipulating vectored data. The method includes shifting bits of packed data comprising M N-bit elements using a bit-level shift step followed by a byte-level shift step. A mask is generated and applied to the intermediate shifted result to produce the final result. A method is disclosed for conditionally transferring data from one general purpose register to another based on data in yet a third general purpose register.

Method and apparatus for manipulating vectored data

A method of multiplying 32-bit values includes decomposing each multiplicand into its 16-bit components. This approach leads to a processor core design which permits re-use of much of the logic in the multiplication unit. The multiplication unit includes a selector which can feed various-sized data formats to the same multiplier circuits. Multiple data transformation paths are provided and feed into a single compression circuit and a single configurable full adder circuit.

Growing community of inventors

Santa Clara, CA, United States of America

Stephane Rossignol