Xilinx, Inc.

Stephan Münz

Juan J Noguera Serra

Baris Ozgul

David Clarke

Peter McColgan

Tim Tuan

Jan Langer

Goran H K Bilski

Sneha Bhalchandra Date

Jose Marques

Pedro Miguel Parola Duarte

Dylan Stuart

Using multiple overlays with a data processing array includes loading an application in a data processing array. The data processing array includes a plurality of compute tiles each having a processor. The application specifies kernels executable by the processors and implements stream channels that convey data to the plurality of compute tiles. During runtime of the application, a plurality of overlays are sequentially implemented in the data processing array. Each overlay implements a different mode of data movement in the data processing array via the stream channels. For each overlay implemented, a workload is performed by moving data to the plurality of compute tiles based on the respective mode of data movement.

Multiple overlays for use with a data processing array

An integrated circuit includes a plurality of data processing engines (DPEs) DPEs. Each DPE may include a core configured to perform computations. A first DPE of the plurality of DPEs includes a first core coupled to an input cascade connection of the first core. The input cascade connection is directly coupled to a plurality of source cores of the plurality of DPEs. The input cascade connection includes a plurality of inputs, wherein each of the plurality of inputs is connected to a cascade output of a different one of the plurality of source cores. The input cascade connection is programmable to enable a selected one of the plurality of inputs.

Data processing engines with cascade connected cores

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Dublin, Ireland

Stephan Münz