Lam Research Corporation

Novellus Systems Incorporated

Stephan Lassig

Jaroslaw Walery Winniczek

Robert P Chebi

Frank Lin

Camelia Rusu

Wan-Lin Chen

Jeff A Bogart

Lily Zheng

S M Reza Sadjadi

Thomas W Mountsier

Vinay Pohray

Chiu Chi

Si Yi Li

Erin Moore

Erin McDonnell

A method of etching features into a silicon layer with a steady-state gas flow is provided. An etch gas comprising an oxygen containing gas and a fluorine containing gas is provided. A plasma is provided from the etch gas. Then, the flow of the etch gas is stopped.

Fabrication of a silicon structure and deep silicon etch with profile control

A method of forming a damascene structure above a substrate is provided. A low-k dielectric layer is formed over the substrate, wherein the low-k dielectric layer does not have a trench stop layer. A plurality of vias are etched through the low-k dielectric layer. Via plugs are formed in the plurality of vias. A plurality of trenches are etched into the low-k dielectric layer, wherein the etching with sufficiently high via plugs minimizes facet formation at the tops of vias exposed to the etch and wherein the trench etch process removes fences caused by the via plugs. The via plugs are stripped.

Method for patterning multilevel interconnects

Growing community of inventors

Danville, CA, United States of America

Stephan Lassig