Telefonaktiebolaget Lm Ericsson (publ)

Sten E Johnson

Terje Egeland

Per Anders Holmberg

Bjorn E Jonsson

Erik B Friman

Oleg Avsan

Lars-&Ouml;rjan Kling

Hans E Sundell

The present invention relates to multiprocessing systems in which signals or processes are scheduled in order of their priority level. The invention is based on batch-wise acceptance and scheduling of job signals, and utilizes at least one delay queue for temporarily storing job signals to the processing system before they are accepted for scheduling. The processing system further comprises circuitry for batch-wise insertion of the temporarily stored job signals into the job scheduler of the multiprocessing system. In this way, the utilization of the parallel processing units is increased and the number of changes between different priority levels in the multiprocessing system is minimized.

Batch-wise handling of signals in a processing system

Method and device to execute two instruction sequences in an order

A method and apparatus for determining what program shall utilize a rapid access memory in a computer working with a plurality of programs and having a conventional slow access (NM) memory and a rapid access memory (CM), characterized in that during a test period there is registered for each program the number of instructions in the program requiring access to the memory, this number being divided by the whole memory space required by a program, the quotients formed after each other in this way being compared with each other and for the program with the highest quotient the memory content is transferred from the slow access memory to the rapid access memory. For each program there is registered with the aid of a counter (RF) the number of instructions requiring access to the slow access memory (NM). This number is divided with the aid of a measuring circuit (R1, R2, JR, KB) by the entire memory space for the respective program noted in a space memory (SM). For the program with the highest quotient the memory content is transferred from the relatively slow access memory (NM) to the rapid access memory (CM). An address memory (AM) is arranged, and for the program information transferred from the slow access memory (NM) to the rapid access memory (CM) the address memory reads out the starting address of the program information in the rapid access memory (CM) on addressing a starting address in the slow access memory (NM).

Method and apparatus for determining in a computer which of a number of

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Huddinge, Sweden

Sten E Johnson