Intel Corporation

Apple Inc.

Intel Mobile Communications Gmbh

Stefano Pellerano

Christopher Hull

Ashoke Ravi

Georgios Yorgos Palaskas

Paolo Madoglio

Jong Seok Park

Ofir Degani

Yanjie J Wang

Brent R Carlton

Peter Sagazio

Shilpa Talwar

Hosein Nikopour

Oner Orhan

Abhishek Agrawal

Woorim Shin

Claudio Da Silva

Eren Sasoglu

Run Levinger

Omer Asaf

Chintan S Thakkar

Erkan Alpman

Somnath Kundu

Meir Gordon

Ravi Pillarisetty

Kameran Azadet

Bryan K Casper

Wook Bong Lee

Michael Genossar

Hubert C George

Zdravko Boos

Debabani Choudhury

Rotem Banin

Hasnain Lakdawala

Sidharth Dalmia

Albert Molina

Lester Lampert

Igal Kushnir

Duncan Kitchin

Saku Lahti

Emanuel Cohen

Mikko S Komulainen

Gadi Shor

Jayprakash Thakur

Arnaud Lucres Amadjikpe

Bernd-Ulrich Klepser

Menashe Soffer

Ana M Yepes

Kunal Datta

Moshe Teplitsky

Eshel Gordon

Josef Hagn

Nebil Tanzi

Ron Pongratz

Tawfiq Musah

Baljit Singh

Amit Freiman

Eyal Goldberger

Kaushik Dasgupta

Eran Gerson

Yossi Tsfati

Shmuel Ravid

Anandaroop Chakrabarti

Noam Kogan

Marian K Verhelst

Nir Weisman

Resti Montoya Moreno

Shuhei Yamada

Telesphor Kamgaing

Georgios C Dogiamis

James S Clarke

Henning Braunisch

Jeanette M Roberts

Neelam Prabhu Gaunkar

Thomas Francis Watson

Diego Correas-Serrano

Adel A Elsherbini

Jing Zhu

Nageen Himayat

Nicole K Thomas

Stephan Henzler

Ehud Reshef

David J Michalak

Zachary R Yoscovits

Roman Caudillo

Rajarshi Mukhopadhyay

Kanwaljit Singh

David Arditti Ilitzky

Thomas A Tetzlaff

Markus Schimper

Farhana Sheikh

Evgeny Shumaker

Gil Horovitz

Gregory W Chance

Alon Cohen

Brandon R Davis

Ehsan Aryafar

Ronen Kronfeld

Sarit Zur

Navid Naderializadeh

Ofer Benjamin

A transceiver may include a transmit path and a receive path that are each coupled to a radio frequency (RF) interface, and a self-interference canceller (SIC). The SIC is coupled between the transmit and the receive paths. The SIC is configured to cancel a self-interference signal from a received signal on the receive path based on a transmit signal on the transmit path.

Self-interference canceller

An apparatus can include a digital-to-analog converter (DAC) and calibration circuitry including an oscillator. The calibration circuitry can be coupled to an output of the DAC, the calibration circuitry to sample and count DAC output pulses for at least two consecutive pulses using at least two separate counter circuits. The calibration circuitry can determine error between at least two consecutive pulses and provide a correction value based on the error. The apparatus can further include correction circuitry to provide a calibration signal to the DAC based on the correction value.

High-speed digital-to-analog converter calibration

Technologies for radiofrequency optimized interconnects for a quantum processor are disclosed. In the illustrative embodiment, signals are carried in coplanar waveguides on a surface of a quantum processor die. A ground ring surrounds the signals and is connected to the ground conductors of each coplanar waveguide. Wire bonds connect the ground ring to a ground of a circuit board. The wire bonds provide both an electrical connection from the quantum processor die to the circuit board as well as increased thermal coupling between the quantum processor die and the circuit board, increasing cooling of the quantum processor die.

Technologies for radio frequency optimized interconnects for a quantum processor

A digital-to-time converter (DTC)-based open loop frequency synthesis and calibration circuit may be used to provide a precise clock signal. The DTC calibration circuit may include a DTC to generate a DTC clock signal based on a received input clock frequency and a received initial digital input code, a phase-lock loop (PLL) to generate a PLL clock signal based on a received PLL input, a binary phase-detector (PD) to generate a PD output based on a comparison between the DTC clock signal and the PLL clock signal, a plurality of calibration bins to generate a signed accumulated PD portion based on the PD output, and an adder to generate a calibrated DTC input code based on a combination of the signed accumulated PD portion and a subsequent digital input code, where the DTC generates a calibrated clock signal based on the calibrated DTC input code.

Calibration for DTC fractional frequency synthesis

Technologies for on-circuit board de-embedding are disclosed. In the illustrative embodiment, several micromechanical relays on a circuit board can connect a trace on the circuit board to an open circuit, a closed circuit, a load circuit, or a through circuit. For the through circuit, the trace is connected to an integrated circuit component mounted on the circuit board. A cable is connected to the trace, allowing for signals to be sent to any of the four circuits without any probes connected to the circuit board. The transmitted and/or reflected signals can be measured, which can be used to de-embed the integrated circuit component.

Technologies for on-circuit board de-embedding

Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.

Scalable gate control in quantum circuit assemblies

Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.

Wireless communication technology, apparatuses, and methods

Various aspects of this disclosure provide a receiver. The receiver may include a down-converter configured to down-convert a received communication signal at a predefined carrier frequency, with a reference signal received from a reference signal generator, and a processor configured to perform a signal quality detection to identify a signal quality metric of the received communication signal at the predefined carrier frequency, and to provide a frequency adjusting signal to the reference signal generator to change the frequency of the reference signal based on the performed signal quality detection to identify the signal quality metric of the received communication signal at the predefined carrier frequency.

Closed-loop baud rate carrier and carrier frequency tuning for wireless chip-to-chip interface

Various aspects provide a transceiver and a communication device including the transceiver. In an example, the transceiver includes an amplifier circuit including an amplifier stage with an adjustable degeneration component, the amplifier stage configured to amplify a received input signal with an adjustable gain, an adjustable feedback component coupled to the amplifier stage; and a controller coupled to the amplifier stage and to the adjustable feedback component and configured to adjust the adjustable feedback component based on an adjustment of the adjustable degeneration component.

Communication device

Embodiments may relate to a baseband module with communication pathways for a first data signal and a second data signal. The baseband module may also include a finite impulse response (FIR) filter in a communication path between the first signal input and the second signal output. Other embodiments may be described or claimed.

Dispersive waveguide crosstalk mitigation

Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) chains to transmit radar Tx signals, and a plurality of Receive (Rx) chains to process radar Rx signals. For example, the radar Rx signals may be based on the radar Tx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.

Radar apparatus, system, and method

An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

Quantum dot based qubit devices with on-chip microcoil arrangements

Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes an array of capacitors that can be charged to a voltage based on a voltage to be applied to a gate of the quantum processor. The capacitors in the array of capacitors are connected to the gate one at a time, charging up a parasitic capacitance. As more capacitors are switched, the voltage on the gate approaches a target voltage with an exponentially-decreasing voltage error.

Technologies for reduction of memory effects in a capacitor for qubit gate control

Millimeter-wave (mmWave) and sub-mmWave technology, apparatuses, and methods that relate to transceivers and receivers for wireless communications are described. The various aspects include an apparatus of a communication device including one or more antennas configured to receive an RF signal and an ADC system. The ADC system includes a 1-bit ADC configured to receive the RF signal, and an ADC controller circuitry configured to measure a number of positive samples in the received RF signal for a plurality of thresholds of the 1-bit ADC, estimate receive signal power associated with the received RF signal based on the measured number of positive samples, determine a direct current (DC) offset in the received RF signal using the estimated received signal power, and adjust the received RF signal based on the determined DC offset.

Equalization and estimation processing in wireless devices

Technologies for a high-voltage transmission gate are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes one or more high-voltage transmission gates that can be used to charge capacitors linked to gates of qubits on the quantum processor. The transmission gate includes transistors with a breakdown voltage less than a range of input and output voltages of the transmission gate. Control circuitry on the companion chip controls the voltages applied to transistors of the transmission gate to ensure that the voltage differences across the terminals of each transistor is below a breakdown voltage.

Technologies for a high-voltage transmission gate

Growing community of inventors

Beaverton, OR, United States of America

Stefano Pellerano