Stmicroelectronics S.r.l.

Marvell International Limited

Sgs-Thomson Microelectronics S.r.l.

Stefano Marchese

Alessandro Savo

Valerio Pisati

Giacomino Bollati

Salvatore Portaluri

Pierandrea Savo

Marco Pasotti

Marco Pio Demicheli

Francesco Rezzi

Gabriele Gandolfi

Vittorio Colonna

Danilo Gerna

Michele Chiabrera

Davide Demicheli

Maurizio Malfa

Luigi Zangrandi

Marco Bongiorni

Alberto Demarziani

Giacomo Bernardi

Alessio Pelle

An apparatus includes a temperature sensor, a digitally-controlled capacitor and a processor. The temperature sensor is coupled to a crystal oscillator and configured to generate an input signal depending on a temperature of the crystal oscillator. The digitally-controlled capacitor is connected to the crystal oscillator and configured to receive a control signal and, based on the control signal, to control a frequency of an output signal generated by the crystal oscillator. The processor is configured to receive the input signal from the temperature sensor, to convert the input signal into the control signal based on parameters that characterize the crystal oscillator and the digitally-controlled capacitor, and to apply the control signal to the digitally-controlled capacitor.

Digitally-based temperature compensation for a crystal oscillator

A high-speed, wide dynamic range, digital accumulator includes a first adder stage in which an input addend is added to a value of a least significant part of an output of an accumulator from a preceding clock period. The accumulator also includes at least one second stage having incrementer/decrementer means for performing an increment, decrement or identity operation on a most significant part of the output of the accumulator. The incrementer/decrementer means includes logic means for triggering the increment, a decrement or identity operation on the most significant part of the accumulator output based on a decision made on results obtained at the previous clock period.

High-speed digital accumulator with wide dynamic range

A method is provided for defining programmed values of the boost and cut-off frequency parameters of a low pass filter of pre-equalization, of a read channel for a magnetic medium mass memory device, to ensure optimal functioning conditions of the adaptive filter of final equalization. The method includes pre-programming instantaneous digital values of the boost and cut-off frequency parameters of the low pass filter of pre-equalization for each magnetic medium, as a function of purposely sensed instantaneous operating parameters of the adaptive filter that carries out the definitive equalization of the signal during a trim scanning of the magnetic medium.

Optimization of the parameters of a pre-equalization low pass filter for a read channel

A transconductor includes a differential stage formed by a pair of input transistors, and a resistive line of degeneration connecting the sources of the input transistors. A bias current generator is coupled between the source of each input transistor and ground. The resistive line of degeneration is formed by one or more transistors connected in series, the gates of which are coupled to a voltage reference. The voltage reference is at least equal to the common mode voltage of the differential stage. The one or more transistors forming the resistive line of degeneration are sized to operate in the triode region.

MOS transconductor with broad trimming range

A programmable-gain multistage amplifier with broad bandwidth and reduced phase variations having a differential input stage biased by a first current source and to which a differential voltage signal is fed, the stage being connected to a pair of diodes in which the cathode terminals are connected to respective bipolar transistors, which are biased by a second current source and in which the collector terminals are connected to load resistors, the differential output of the amplifier being provided at the collector terminals of the bipolar transistors. The amplifier further includes two circuit branches, each of which is constituted by a bipolar transistor and by a third current source, which is respectively connected to the collector terminal and emitter terminal of the bipolar transistor, in which the base terminal receives the differential voltage signal and the collector terminal is connected to the cathode terminal of a respective one of the two diodes, the circuit branches being mutually connected by means of a pair of capacitors.

Variable-gain multistage amplifier with broad bandwidth and reduced phase variations

An amplifier with programmable gain and input linearity at high frequency allows an increase in the gain without effecting input linearity and without significantly increasing current consumption. The amplifier includes an input stage which receives a voltage signal for performing a current conversion thereof with compression. An output stage is connected to the input stage and decompresses the signal provided by the input stage for producing gain amplification thereof. The amplifier further includes at least one current amplifier stage interposed between the input stage and the output stage. The at least one current amplifier includes at least one bipolar transistor series-connected to a load diode and to a current source. A reduction in the transconductance of the load diode is provided in the at least one amplifier stage to determine a programmable gain factor for the amplifier.

Amplifier with programmable gain and input linearity usable in

The speed of a capacitive cell RAAM used for storing an optical image as electric charge is greatly enhanced by presampling the serial analog input signal on two rows or lines of presampling capacitors, each composed of the same number of capacitors as the number of columns of the capacitive cell RAAM and by 'writing' in a parallel mode the selected row of said memory. The values stored in the capacitors of one of said two presampling rows are transferred (written) in the corresponding cells of the selected row of the memory while presampling continues on the other row of presampling capacitors.

Analog memory for storing a QCIF image or the like as electric charge

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Pavia, Italy

Stefano Marchese