Infineon Technologies Ag

Infineon Technologies Austria Ag

Stefan Willkofer

Bernhard Knott

Uwe Wahl

Andreas Strasser

Markus Hammer

Andreas Kiep

Carsten Ahrens

Berthold Schuderer

Hans-Joachim Schulze

Wolfgang Roesner

Wolfgang Lehnert

Ulrich Krumbein

Andreas Grassmann

Rudolf Berger

Gernot Langguth

Uwe Hoeckele

Johann Strasser

Juergen Wagner

Thomas Kunstmann

Manfred Frank

Eva-Maria Hess

Anja Gissibl

Matthias Mueller

An embodiment relates to a device comprising a high-side semiconductor, a low-side semiconductor, a first sensing element arranged adjacent to the high-side semiconductor. The first sensing element is isolated from the high-side semiconductor and the first sensing element is directly connectable to a processing device.

Sensing element for semiconductor

A discrete semiconductor transistor includes a gate resistor electrically coupled between a gate electrode terminal and a gate electrode of the discrete semiconductor transistor. A resistance R of the gate resistor at a temperature of &#x2212;40&#xb0; C. is greater than at the temperature of 150&#xb0; C.

Discrete semiconductor transistor

A circuit may comprise an electronic switching element, an integrated sensor, and a low-impedance path from one of the terminals of the sensor to one of the terminals of the electronic switching element.

Electronic switching element and integrated sensor

An example relates to a circuit comprising an electronic switching element and an temperature compensating element, which is arranged in the vicinity of the electronic switching element.

Current or voltage sensing

A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Semiconductor device and method of manufacture thereof

A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.

Method for producing a semiconductor device

Apparatuses and methods are provided where porous metal is deposited on a substrate, a mask is provided on the porous metal and then an etching is performed.

Porous metal etching

A method for producing a connection region on a side wall of a semiconductor body is disclosed. A first trench is produced on a first surface of a semiconductor body and extends into the semiconductor body. An insulation layer is formed on the side walls and on the bottom of the first trench, and the first trench is only partially filled. The unfilled part of the first trench is filled with an electrically conductive material. A separating trench is produced along the first trench in such a way that a side wall of the separating trench directly adjoins the first trench. The part of the insulation layer which adjoins the separating trench is at least partially removed, with the result that at least some of the electrically conductive material in the first trench is exposed.

Method for producing a connection region on a side wall of a semiconductor body

Growing community of inventors

Munich, Germany

Stefan Willkofer