Mitsubishi Electric Research Laboratories, Inc.

Wisconsin Alumni Research Foundation

Stark Draper

Jonathan S Yedidia

Yige Wang

Anthony Vetro

Nam Sung Kim

Benjamin H Recht

Siddharth Barman

Yagiz Sutcu

An error detection/correction system provides an electronic circuit detecting and correcting transmission errors using linear programming. Linear programming techniques are made practical for real-time error correction and decoding by dividing the linear programming problem into independent parallelizable problems so that separate independent portions of the electronic circuit may simultaneously address solutions related to individual bits and/or parity rules.

Error correction circuit for data communication providing parallelizable linear programming decoding

A heterogeneous cache structure provides several memory cells into different ways each associated with different minimum voltages below which the memory cells produce substantial state errors. Reduced voltage operation of the cache may be accompanied by deactivating different ways according to the voltage reduction. The differentiation between the memory cells in the ways may be implemented by devoting different amounts of integrated circuit area to each memory cell either by changing the size of the transistors comprising the memory cell or devoting additional transistors to each memory cell in the form of shared error correcting codes or backup memory cells.

Energy efficient processor having heterogeneous cache

A method estimates parameters of 3-phase voltage signals to synchronize a power grid in a presence of a voltage unbalance by transforming the 3-phase voltage signals to &#x3b1;&#x3b2;-reference signals using a Clarke transformation matrix, and estimating sinusoidal signals and corresponding quadrature signals of the &#x3b1;&#x3b2;-reference signals using an extended Kalman filter, and determining a phase angle of a positive sequence based on a relationship of the phase angle to the estimated the sinusoidal signals.

System and method for determining quasi-cyclic low-density parity-check codes having high girth

A code to be decoded by message-passing is represented by a factor graph. The factor graph includes variable nodes indexed by i and constraint nodes indexed by a connected by edges for transferring messages moutgoing from the variable nodes to the constraint nodes and messages mincoming from the constraint nodes to the variable nodes. The messages mare initialized based on beliefs bof a received codeword. The messages mare generated by overshooting the messages mat the constraint nodes. The beliefs bare updated at the variable nodes using the messages m. The codeword is outputted if found, otherwise, the messages mare updated using a correction for the overshooting.

Method and system for decoding graph-based codes using message-passing with difference-map dynamics

Biometric parameters acquired from human faces, voices, fingerprints, and irises are used for user authentication and access control. Because the biometric parameters are continuous and vary from one reading to the next, syndrome codes are applied to determine biometric syndrome vectors. The biometric syndrome vectors can be stored securely, while tolerating an inherent variability of biometric data. The stored biometric syndrome vector is decoded during user authentication using biometric parameters acquired at that time. The syndrome codes can also be used to encrypt and decrypt data. The biometric parameters can be pre-processed to form a binary representation, in which the binary representation has a set of predetermined statistical properties enforced imposed by a set of binary logical conditions.

Pre-processing biometric parameters before encoding and decoding

A multi-stage decoder decodes a block of symbols, received via a noisy channel, to a codeword. The decoder includes multiple sub-decoders connected sequentially, and wherein a next sub-decoder has a slower processing time and better word error rate than a previous sub-decoder, and wherein the next sub-decoder is only executed if the previous decoder fails to decode the block sequence of symbols, and a last sub-decoder is executed until a termination condition is reached.

Multi-stage decoder for error-correcting codes

A method constructs a code, wherein the code is a large-girth quasi-cyclic low-density parity-check code. A base matrix is selected for the code. A cost matrix corresponding to the base matrix is determined. A single element in the base is changed repeatedly maximize a reduction in cost. A parity check matrix is constructing for the code from the base matrix when the cost is zero, and an information block is encoded as a code word using the parity check matrix in an encoder.

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Madison, WI, United States of America

Stark Draper