International Business Machines Corporation

Stanley Roberts

James Gardner Ryan

Carter W Kaanta

Mousa H Ishaq

Francis Roger White

Joseph John Fatula, Jr

Dennis P Bouldin

Ning Hsieh

Dale P Hallock

Eugene A Irene

Kwangwoo Choi

An improved VLSI or ULSI structure and a method of forming the same are provided. The structure starts with a base member having a plurality of supports formed thereon and extending upwardly therefrom. A selectively removable material is deposited on the base member and around the supports. An insulating cap is formed over the supports and the removable material. Access openings are provided through the cover (or base) and the removable material is removed through the access openings. Thereafter a partial vacuum is formed in the space evacuated by the removable material, and the access openings sealed to provide a dielectric medium around the supports and between the base and cap member having a dielectric constant of less than 2.0.

Method and structure for providing improved insulation in VLSI and ULSI

An improved VLSI and ULSI structure and a method of forming the same are provided. The structure starts with a base member having a plurality of supports formed thereon and extending upwardly therefrom. A selectively removable material is deposited on the base member and around the supports. An insulating cap is formed over the supports and the removable material. Access openings are provided through the cover (or base) and the removable material is removed through the access openings. Thereafter a partial vacuum is formed in the space evacuated by the removable material, and the access openings sealed to provide a dielectric medium around the supports and between the base and cap member having a dielectric constant of less than 2.0.

Method for providing improved insulation in VLSI and ULSI circuits

A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of:

Salicide process for forming low sheet resistance doped silicon junctions

A method for diffusing a conductively determining impurity in a semiconductor substrate and making electrical contact thereto by depositing a layer of a rare earth boride material over a predetermined surface portion of the substrate and heating the substrate for a predetermined period of time at a predetermined temperature which is sufficient to cause boron from the boride material to diffuse into the adjoining portion of the substrate to modify its conductive characteristics. At the same time a good electrical ohmic contact is established between the boride material and the adjoining substrate portion while the boride material retains its conductivity even after the outdiffusion of some of its boron into the substrate during the heat treatment.

Method for making diffusions into a substrate and electrical connections

A method for diffusing a conductivity determining impurity in a semiconductor substrate and making electrical contact thereto by depositing a conductive layer made of a rare earth hexaboride material containing a predetermined amount of silicon in it over a surface portion of the substrate and heating the substrate for a predetermined period of time at a predetermined temperature which is sufficient to cause boron from the hexaboride material to diffuse into the adjoining portion of the substrate to modify its conductor characteristics. At the same time a good electrical ohmic contact is established between the conductive layer and the adjoining substrate portion while the conductive layer retains its conductivity even after the outdiffusion of some of its boron into the substrate during the heat treatment. A silicon dioxide layer is also formed on the exposed surface of the silicon containing hexaboride material through the oxidation of the silicon disposed close to the exposed surfaces of the hexaboride material.

An improved method for making polycide structures for use in electrode and wiring interconnection applications. It includes depositing a layer of polysilicon on an insulating layer and forming on this polysilicon layer a silicide structure and a silicon capping layer. The deposited layers are defined and etched through dry etching techniques using a dry etching mask made of a refractory metal that does not form a volatile halide in a dry etching environment. Metals with such characteristics include cobalt (Co), nickel (Ni), iron (Fe), and manganese (Mn). The metal mask and the other deposited layers may be formed and defined using a photoresist mask as a deposition mask formed to be compatible with lift-off techniques. The silicide may be deposited either through a chemical vapor deposition process or through evaporation techniques. If it is formed through the co-evaporation of metal and silicon, then the structure is subjected to a low temperature reaction annealing step at a temperature between 500.degree. and 600.degree. C. prior to dry etching. To avoid a diffusion of the metal mask into the silicon layer, during this low temperature annealing, the process provides for the formation of a diffusion barrier layer between the metal mask and the silicon layer. Following the removal of the metal mask and the diffusion barrier layer, the structure is annealed at a temperature sufficient to cause the homogenization of the silicide layer.

Process for making polycide structures

An improved method of fabricating a stable high dielectric constant and low leakage dielectric material which includes oxidizing at a temperature of about 600.degree. C. or higher a layer of a mixture of a transition metal nitride and silicon nitride to produce a mixture which includes an oxide of the transition metal and silicon nitride. The initial mixture of transition metal nitride and silicon nitride may be deposited by reactive sputtering techniques or other known deposition techniques on, a semiconductor or an electrically conductive layer, and the thickness of the mixture should be within the range of 3 to 50 nanometers. By depositing an electrically conductive layer on the oxidized mixture, a capacitor having a high dielectric, and low current leakage dielectric medium is provided.

Process for making high dielectric constant nitride based materials and

An improved method of fabricating a stable high dielectric constant and low leakage dielectric material includes oxidizing at a temperature of about 400.degree. C. or higher a layer of a transition metal-silicon alloy having 40% to 90% transition metal by atomic weight to produce a silicate or homogeneous mixture. The mixture includes an oxide of the transition metal and silicon dioxide. The alloy may be deposited on, e.g., a semiconductor or an electrically conductive layer that is oxidation resistant, and the thickness of the mixture or oxidized alloy should be within the range of 5 to 50 nanometers. By depositing an electrically conductive layer on the homogeneous mixture, a capacitor having a high dielectric, low leakage dielectric medium is provided.

Method of making high dielectric constant insulators and capacitors

A method of forming a refractory metal silicide pattern on a substrate by (1) forming a blanket layer of SiO.sub.2 on the substrate, (2) depositing a blanket layer of polycrystalline Si over the SiO.sub.2 layer, (3) defining a pattern in the blanket Si layer thereby exposing selected areas of the SiO.sub.2 layer, (4) depositing a blanket layer of refractory metal silicide on the substrate over the SiO.sub.2 and Si layers, (5) heating the substrate in an oxidizing environment to a temperature sufficient to oxidize the metal silicide layer over the Si to form an upper layer of SiO.sub.2 and to convert the metal silicide layer overlying the SiO.sub.2 layer to a metal rich SiO.sub.2 layer, and exposing the oxidized surface to an etchant that selectively etches away the metal rich SiO.sub.2 layer.

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South Burlington, VT, United States of America

Stanley Roberts