Semiconductor Components Industries, LLC

Ami Semiconductor, Inc.

Stan Latimer

Joseph J Walsh

Robert B Smith

Morgan Ercanbrack

In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component.

Interleaved noise reduction circuit and method

A dual differential-input operational amplifier that includes six PMOSFETs having their source terminals coupled to a high voltage. A seventh and eighth PMOSFET have their source terminals coupled to a current source. Four NMOSFETs have their source terminals coupled to a low voltage. A fifth and sixth NMOSFET have their source terminals coupled to a current sink. The various PMOSFETs and NMOSFETs are coupled together such that the gate terminals of the fifth NMOSFET and eighth PMOSFET receive a first input of the differential input, and such that the gate terminals of the sixth NMOSFET and the seventh PMOSFET receive a second input of the differential input. The operational amplifier may be vertically inverted, or implemented by bipolar transistors, with cascoding devices, and with a second stage in the form of an inverter.

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Pocatello, ID, United States of America

Stan Latimer