Synopsys, Inc.

Srivatsan Raghavan

Mikhail Bershteyn

Prashant Kumar Mishra

Kiran Lokhande

Vinod Chandrasekaran

A method includes: loading a circuit design including a plurality of combinational elements and controlled by a user clock; detecting strongly connected components (SCCs) corresponding to the plurality of combinational elements in the circuit design; inserting a plurality of break registers into the circuit design, each break register being between two combinational elements of a corresponding SCC of the SCCs to break the corresponding SCC, the plurality of break registers being clocked by a relaxation clock; detecting, by a processor, during an emulation run of the circuit design, one or more value mismatches across an input pin and an output pin of one or more break registers of the plurality of break registers based on a relaxation cycle of the relaxation clock, the one or more break registers being associated with one or more SCCs exhibiting instability; and reporting an instability event based on the one or more value mismatches.

Detecting instability in combinational loops in electronic circuit designs

A method for determining a sparse memory size during emulation, the method including: determining, by a profiler memory coupled to a user memory, that one or more pages of the user memory are used by a first test sequence of a testbench during the emulation; identifying, by the profiler memory, a first set of indexes of the one or more pages of the user memory used by the first test sequence; determining a number of unique pages of the user memory that are used by the first test sequence for the emulation based on the first set of indexes; determining, by a processor, the sparse memory size for the user memory based on the number of unique pages of the user memory that are used by the testbench for the emulation and a page size of the user memory.

Growing community of inventors

Karnataka, India

Srivatsan Raghavan