Intel Corporation

Srivallaba Mysore

Abhishek R Appu

Prasoonkumar Surti

Subhajit Dasgupta

Joydeep Ray

Vasanth Ranganathan

Michael J Norris

Travis T Schluessler

Linda L Hurd

Eric J Hoekstra

Daren J Schmidt

Hiroshi Akiba

One embodiment provides for a graphics processing unit comprising a processing cluster to perform multi-rate shading via coarse pixel shading and output shaded coarse pixels for processing by a post-shader pixel processing pipeline.

Fragment compression for coarse pixel shading

One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from a pixel processing pipeline.

Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.

Dedicated fixed point blending for energy efficiency

One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.

Growing community of inventors

Folsom, CA, United States of America

Srivallaba Mysore