Micron Technology Incorporated

Sriteja Yamparala

Tawalin Opastrakoon

Walter Di Francesco

Fulvio Rori

Chiara Cerafogli

Marco Domenico Tiburzi

A method can include identifying one or more candidate memory blocks that are available for garbage collection, determining a respective erase depth level for each candidate memory block based on one or more block characteristics of the candidate memory block, erasing the candidate memory blocks, wherein each of the candidate memory blocks is erased in accordance with the respective erase depth level determined for the candidate memory block, receiving a request to write data subsequent to erasing the candidate memory blocks, and, responsive to receiving the request to write data, selecting a first memory block from the erased candidate memory blocks in accordance with the respective erase depth level of each of the erased candidate memory blocks. The block characteristics of the candidate memory block can include a program erase count and/or a temperature of the candidate memory block.

Varying memory erase depth according to block characteristics

Various embodiments of the present disclosure relate to monitoring the integrity of power signals within memory systems. A method can include receiving a power signal at a memory component, and monitoring, via a power signal monitoring component of the memory component, an integrity characteristic of the power signal. Responsive to the integrity characteristic meeting a particular criteria, the method can include providing a status indication to a control component external to the memory component.

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Boise, ID, United States of America

Sriteja Yamparala