Intel Corporation

Srirama Pedarla

Tawfik Arabi

Gregory F Taylor

Patrick Elwer

Dan Murray

Gary A Andrew

Greg Eberlein

Dave Riendeau

Some embodiments of the invention include apparatus and systems having integrated circuits. Terminals or pins of the integrated circuits are configured to be driven to a state, to be floated for a time interval, and to be measured to determine the state of the terminals after the time interval. The measurement involves sampling the RC time constant of leakage current of the terminals. Other embodiments are described and claimed.

AC testing of leakage current in integrated circuits using RC time constant

A method of testing an integrated circuit includes applying a voltage to one of the pins of the integrated circuit. The pin is floated for a predetermined time. A measurement is performed after the predetermined time. The measurement involves sampling the RC time constant of leakage current of the pins.

An apparatus that can determine whether a Tva parameter and a Tvb parameter of a device under test (DUT) complies with a design specification where the device under test is coupled to a secondary device. The Tvb parameter corresponds to a setup time of the secondary device. The Tva parameter corresponds to the hold time of the secondary device. The apparatus allows the DUT to be coupled to a secondary device that normally operates with the DUT. The apparatus writes data to the DUT and secondary device. The data is then written back to the apparatus which then determines whether the DUT complies with the Tvb and Tva design specifications. The apparatus may also implement tunable delay circuits to compensate for different setup and hold times of the secondary device.

Test and characterization of source synchronous AC timing specifications by trace length modulation of accurately controlled interconnect topology of the test unit interface

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Portland, OR, United States of America

Srirama Pedarla