Western Digital Technologies, Inc.

Emulex Design & Manufacturing Corporation

Emulex Corporation

Sriram Rupanagunta

Kenneth Alan Okin

Ashish Singhai

Sandeep Sharma

George Moussa

Krishanth Skandakumaran

Rajendra Prasad Mishra

Srikant Sadasivam

Parav Pandit

Parag Bhide

Mukund T Chavan

Nagaraj Kalmala

Sriharsha Jayanarayana

Amar Kapadia

Embodiments of the present invention receive I/O commands expressed in either vendor-specific or non-vendor-specific protocols and normalize them into a common format for execution by different memory devices. Embodiments of the present invention identify these I/O commands using parameters common to both types of protocols. In this fashion, embodiments store normalized commands in data structures for execution by memory devices in which the normalized commands represent instructions for performing an action corresponding with execution of the original I/O command. Accordingly, embodiments of the present invention save resources with respect to hardware and software maintenance costs.

Method and system for a common processing framework for memory device controllers

A vendor extension command is used to transport a proprietary message to a device (e.g., a solid state drive), to instruct the device to access and return data stored on the device (e.g., data that can be used for debugging). More specifically, a device that is coupled to a host system by a host bus interface (e.g., a Peripheral Component Interconnect Express bus) receives a command in a vendor extension of a standard driver (e.g., a Non-Volatile Memory Express driver). In response to the command in the vendor extension, data (e.g., debugging data) stored in memory on the device is accessed. The data can then be sent over the host bus interface to the host system. Thus, for example, a proprietary debugging framework can be used with a standards-based device.

Using a proprietary framework on a standards-based embedded device

Embodiments of the present invention are operable to efficiently schedule memory device commands, such as flash memory device commands, while taking into account the interdependencies of processing such commands. As such embodiments of the present invention order commands to make sure that data is written and read from memory devices in a coherent fashion using command groups. Commands within such command groups are scheduled concurrently or in parallel. In this fashion, embodiments of the present invention promote efficient execution of memory device commands while maintaining any required arbitrary ordering requirements.

Method and system for efficient common processing in memory device controllers

The splitting of storage applications and functions into a control path (CP) component and a data path (DP) component is disclosed. Reads and writes may be handled primarily in the DP. The CP may be responsible for discovery, configuration, and exception handling. The CP can also be enabled for orchestrating complex data management operations such as snapshots and migration. Storage virtualization maps a virtual I/O to one or more physical I/O. A virtual target (vTarget) in the virtual domain is associated with one physical port in the physical domain. Each vTarget may be associated with one or more virtual LUNs (vLUNs). Each vLUN includes one or more vExtents. Each vExtent may point to a region table, and each entry in the region table may contain a pointer to a region representing a portion of a pExtent, and attributes (e.g. read/write, read only, no access) for that region.

Apparatus for performing storage virtualization

Embodiments of the present invention are related to a device and a method for more efficiently processing Ethernet communications that include FCOE communications. In some embodiments the device is a single device including a combination of an aggregator, a filter and a gateway. Such a combination can be more practical, affordable and efficient than the usual arrangement of a several separate devices. In other embodiments, the device of the present invention can be a combination of a switch and a gateway. In yet other embodiments other types of devices can be used. More generally, embodiments of the present invention can apply to a device or method for processing communications involving a set of two network protocols (first and second protocols) as well as a third protocol, the third protocol being compatible with the first protocol and used to define how to tunnel the second protocol over the first protocol.

Combined FCoE network device

An intelligent network processor is disclosed that provides a PCI express (PCIe) host bus adapter with firmware selectable hardware capabilities and firmware enabled emulation of capabilities not supported by hardware. Support for Fibre Channel (FC) and Gigabit Ethernet (GbE) protocols are provided through the same fabric ports, including multiple port trunking for both protocols. On chip protocol conversion is provided for switching and routing between FC and GbE ports. Switching using the same crossbar module is provided for both FC and GbE protocols. The crossbar module is coupled to directly access external DDR memory so that messages from FC, GbE, and PCIe interfaces may be switched directly to the DDR memory.

Growing community of inventors

Bengaluru, India

Sriram Rupanagunta