Texas Instruments Corporation

Sriram Murali

Jaiganesh Balakrishnan

Karthik Subburaj

Karthik Ramasubramanian

Sandeep Rao

Sundarrajan Rangachari

Sachin Bhardwaj

Sarma Sundareswara Gunturi

Pankaj Gupta

Pooja Sundar

Yeswanth Guntupalli

Brian Paul Ginsburg

Krishnanshu Dandu

Sreekiran Samala

Sachin Bharadwaj

Aswath Vs

Jawaharlal Tangudu

Sthanunathan Ramakrishnan

Aravind Ganesan

Sashidharan Venkatraman

Nagalinga Swamy Basayya Aremallapur

Ram Narayan Krishna Nama Mony

Sanjay Pennam

Wenjing Lu

Harshavardhan Adepu

Tarkesh Pande

Visvesvaraya Appala Pentakota

Sandeep Kesrimal Oswal

Jayawardan Janardhanan

Indu Prathapan

Rahul Anand Sharma

Goutam Dutta

Bijoy Bhukania

Sreenath Narayanan Potty

Viswanathan Nagarajan

Chandrasekhar Sriram

Harikrishna Parthasarathy

Neeraj P Nayak

Sachin Bharadwaj, Jr

Murugesh Prashanth Subramaniam

Zahir Ibrahim Parkar

Kalyan Gudipati

Venkateshwara Reddy Pothapu

Jagdish Kumar Agrawal

Sandeep Kasargod

Girish Nadiger

Yogesh Shekar

Sanjay Vishwakarma

Prasad Gandewar

Kapil Kumar

Crest factor reduction circuitry includes: a peak neighborhood analyzer; peak detection circuitry and a controller. The peak neighborhood analyzer is configured to: receive an input signal; analyze the input signal to determine whether a peak larger than a target threshold is expected within an interval; and provide a first control signal responsive to determining that a peak larger than the target threshold is expected within the interval. The controller is configured to: receive the first control signal; and gate a clock or data to the peak detection circuitry responsive to the first control signal.

Power efficient crest factor reduction

A multi-mode radar system, radar signal processing methods and configuration methods, including using predetermined, range/mode-specific pushing windows to perform windowing on range and velocity object data before performing an FFT on the windowed object data matrix to generate a three-dimensional object matrix including range, velocity and angle data. The individual windows have an angular spectral response that corresponds to a combined angular coverage field of view of the transmit and receive antennas for the corresponding mode to minimize the total weighted energy outside the main lobe and to provide increasing spectral leakage outside the combined angular coverage field of view with angular offset from the main lobe to push out much of the spectral leakage into regions where leakage tolerance is high due to the corresponding combined angular coverage field of view of the transmit and receive antennas.

Multi-mode radar systems, signal processing methods and configuration methods using pushing windows

A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.

Interference detection in a frequency modulated continuous wave (FMCW) radar system

A radar system is provided that includes a receive channel configured to receive a reflected signal and to generate a first digital intermediate frequency (IF) signal based on the reflected signal, a reference receive channel configured to receive a reflected signal and to generate a second digital IF signal based on the reflected signal, and digital mismatch compensation circuitry coupled to receive the first digital IF signal and the second digital IF signal, the digital mismatch compensation circuitry configured to process the first digital IF signal and the second digital IF signal to compensate for mismatches between the receive channel and the reference receive channel.

Digital compensation for mismatches in a radar system

Aspects of the present disclosure provide for a radar system including a radar IC including a timing engine, a local oscillator, and a modulator. The timing engine is configured to generate one or more chirp control signals. The local oscillator is configured to receive the one or more chirp control signals and generate a frame including a first sequence of chirps according to the one or more chirp control signals. The modulator is configured to modulate the first sequence of chirps to generate a second sequence of chirps so the frame includes the first sequence of chirps and the second sequence of chirps offset by a first frequency value.

Radar system

A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sin c response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sin c filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

Low-complexity inverse sinc for RF sampling transmitters

A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.

Noise mitigation in radar systems

A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Digital upconverter for radio frequency sampling transmitter

Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Dual mode digital filters for RF sampling transceivers

A radar system is provided that includes transmission signal generation circuitry, a transmit channel coupled to the transmission generation circuitry to receive a continuous wave test signal, the transmit channel configurable to output a test signal based on the continuous wave signal in which a phase angle of the test signal is changed in discrete steps within a phase angle range, a receive channel coupled to the transmit channel via a feedback loop to receive the test signal, the receive channel including an in-phase (I) channel and a quadrature (Q) channel, a statistics collection module configured to collect energy measurements of the test signal output by the I channel and the test signal output by the Q channel at each phase angle, and a processor configured to estimate phase and gain imbalance of the I channel and the Q channel based on the collected energy measurements.

In phase (I) and quadrature (Q) imbalance estimation in a radar system

A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay &#x394;T, wherein &#x394;T=T/K, K&#x2265;2 and Tis an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Maximum measurable velocity in frequency modulated continuous wave (FMCW) radar

A circuit includes a noise generator and a delay element. The output of the noise generator couples to the input of the delay element. The output of the delay element is coupled to a first input of a logic circuit, and the output of the noise generator is coupled to a second input of the logic circuit. The output of the logic circuit is coupled to a first control input of a waveform storage circuit. The waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic circuit and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic circuit. A sequencer has a sequencer output coupled to the second control input of the waveform storage circuit.

Dither generation for radio frequency sampling digital-to-analog converters

Analog gain correction circuitry and analog switching clock edge timing correction circuitry can provide coarse correction of interleaving errors in radio-frequency digital-to-analog converters (RF DACs), such as may be used in 5G wireless base stations. The analog correction can be supplemented by digital circuitry configured to 'pre-cancel' an interleaving image by adding to a digital DAC input signal a signal equal and opposite to an interleaving image created by the interleaving DAC, such that the interleaving image is effectively mitigated. Error correction control parameters can be periodically adjusted for changes in temperature by a controller coupled to an on-chip temperature sensor. A model useful for understanding the sources of error in interleaving DACs is also described.

Interleaving errors sources and their correction for RF DACs

One example includes a receiver system. The receiver system includes an analog-to-digital converter (ADC) configured to convert an analog input signal into a digital output signal at a sampling frequency. The receiver system also includes a spur correction system configured to receive the digital output signal and to estimate spurs associated with the digital output signal and to selectively correct a subset of the spurs associated with a set of frequencies that are based on the sampling frequency.

Spur estimating receiver system

A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q'-data and first I&#x2032;-data and during the second chirp the IQMM correction circuit provides at least second Q&#x2032;-data and second I&#x2032;-data.

Dynamic IQ mismatch correction in FMCW radar

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Bengaluru, India

Sriram Murali