Texas Instruments Corporation

Srinivasan Venkataraman

Harish Kumar

Himamshu Gopalakrishna Khasnis

Bhaskar Ramachandran

Somshubhra Paul

Julio E Acosta

Anjana Ghosh

Junfeng Jiang

Krishnan Ramabhadran

Manoj S Soman

A method includes generating a reference voltage by periodically switching direction of current flow in a diagnostic sensor, where the reference voltage is a non-sinusoidal differential voltage of which an amplitude alternates between minimum and maximum values, and where the reference voltage includes a diagnostic sensor output voltage component responsive to an external magnetic field and a diagnostic sensor offset voltage component responsive to a mismatch of the diagnostic sensor. The method also includes amplifying the reference voltage to produce an amplified reference voltage, where the amplified reference voltage is a differential voltage having an amplifier offset voltage component. Additionally, the method includes demodulating the amplified reference voltage by filtering the diagnostic sensor offset voltage component and the amplifier offset voltage component to produce a demodulated voltage. Also, the method includes digitizing the demodulated voltage to produce a digitized voltage.

Methods and systems for diagnosing magnetic sensors

A magnetic sensor circuit includes a plurality of magnetic sensors having bias input and bias output terminals and first and second measurement terminals. The circuit includes a diagnostic sensor having bias input and bias output terminals and first and second measurement terminals. The circuit includes a first multiplexer configured to selectively couple a current source to the bias input terminals of the magnetic sensors or to the bias input terminal of the diagnostic sensor and includes a second multiplexer configured to selectively couple the bias output terminals of the magnetic sensors or the bias output terminal of the diagnostic sensor to a first terminal of a switch. The circuit includes a third multiplexer configured to selectively couple the measurement terminals of the magnetic sensors or the measurement terminals of the diagnostic sensor to differential input terminals of an amplifier.

A Hall sensor trim circuit includes a current source, a transistor, a reference voltage circuit, an amplifier, and a Hall sensor. The transistor includes a first terminal, a second terminal, and a third terminal. The third terminal is coupled to the current source. The amplifier includes an output terminal, a first input terminal, and a second input terminal. The output terminal is coupled to the first terminal of the transistor. The first input terminal is coupled to the second terminal of the transistor. The second input terminal is coupled to the reference voltage circuit. The Hall sensor is coupled to the current source.

Hall sensor trim circuit

A single sleep mode controller which ensures that there is at least a corresponding minimum voltage level across capacitors when the corresponding regulators are turned off. In an embodiment, the sleep mode controller uses a single comparator which compares the voltages across capacitors in a time division multiplexed (TDM) manner, and initiates the charging operation for the capacitor if the voltage level falls below a corresponding minimum voltage level. The sleep mode controller continues the charging operation until the voltage level exceeds a corresponding upper threshold value. Due to the use of the single controller, power and/or space savings may be attained.

Reducing power/area requirements to support sleep mode operation when regulators are turned off

A method for transfer of digital data, comprising a succession of one values and zero values, across a capacitive interface. The interface includes a first capacitor and a second capacitor in parallel, linking a first circuit to a second circuit. First digital data is transferred from the first circuit to the second circuit, and a reference clock is provided by the first circuit and transmitted with the first data to the second circuit for recovery thereby. A first set of bi-level signals representing the zero values of the first data is applied to the first capacitor, such that a repeating level transition of the reference clock corresponds to a first level transition of the first set of bi-level signals. A second set of bi-level signals representing the one values of the first data is applied to the second capacitor, such that the repeating transition of the reference clock corresponds to a second level transition of the second set of bi-level signals. The clock and data are then recovered.

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Irving, TX, United States of America

Srinivasan Venkataraman