Intel Corporation

Srinivasa R Aravamudhan

Feroz Mohammad

Carl L Deppisch

Edward Rudolph Prack

Ashay A Dani

Anna M Prakash

Mukul P Renavikar

Rajen S Sidhu

Lilia May

Thomas J De Bonis

Jason Jieping Zhang

James C Matayabas

Chang Lin

Donald Tiendung Tran

Srikant Nekkanty

Christopher D Combs

Kuang C Liu

Steven A Klein

Alexander W Huettis

Hemant Mahesh Shah

Embodiments herein relate to systems, apparatuses, or processes for coupling or decoupling two substrates by heating pins on one of the substrates and either inserting or withdrawing the heated pins from solder elements on a BGA. In particular, by heating a plurality of pins on a first side of a first substrate, where the plurality of pins are substantially perpendicular to a plane of the substrate, inserting the heated plurality of pins into BGA attached to a second substrate where the BGA includes a plurality of solder elements aligned with the plurality of pins and where the heated plurality of pins melt the plurality of solder elements upon insertion. The inserted plurality of pins physically and/or electrically couple the first substrate and the second substrate.

Heated pins to couple with solder elements

Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.

Pressure features to alter the shape of a socket

Apparatus and method associated with surface structures of compute component packages are disclosed herein. In embodiments, an apparatus may include a plurality of structures provided on a surface of a compute component package, wherein the plurality of structures are to be used to attach and electrically couple the compute component package to another device, and wherein a structure of the plurality of structures includes first and second portions, the second portion disposed further from the surface than the first portion, and the first portion to comprise a material different from the second portion.

Surface structure method and apparatus associated with compute or electronic component packages

An electronic device that includes a first electronic component with a pin element and a second electronic component with a solder element. A joint is formed that provides an electrical and mechanical connection between the first electronic component and second electronic component when the pin element is heated, inserted into the solder element, and cooled.

Pin through solder interconnect and methods

An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

Package structure to enhance yield of TMI interconnections

Growing community of inventors

Beaverton, OR, United States of America

Srinivasa R Aravamudhan