University of South Florida

Honeywell Space Systems, Inc.

Srinivas Katkoori

Sheikh Ariful Islam

Rohith Prasad Challa

Jeremy Ramos

Praveen K Samudrala

An exemplary integrated circuit design lockout system comprises an integrated circuit and a key obfuscated circuit embedded with the integrated circuit. The key obfuscated circuit is configured to verify that a user provides a valid key for the integrated circuit before the user is allowed to operate the integrated circuit. The exemplary integrated circuit design lockout system further comprises a lockout circuit embedded with the key obfuscated circuit, wherein the lockout circuit is configured to allow for a threshold number of failed attempts for the user to provide the valid key before the lockout circuit prohibits the user from making any further attempts at providing the valid key for the integrated circuit.

Lockout systems and methods

The present disclosure presents various systems and methods for implementing a physical unclonable function device. One such method comprises providing an integrated circuit having a plurality of set/reset flip flop logic circuits, wherein each of the set/reset flip flop logic circuits enters a metastable state for a particular input sequence. The method includes varying circuit parameters for each of the plurality of set/reset flip flop logic circuits to account for manufacturing variations in the set/reset flip flop logic circuits and enable generating a stable but random output in response to the particular input sequence. Thus, by applying the particular input sequence to the integrated circuit, a unique identifier for the integrated circuit can be derived from an output response of the plurality of set/reset flip flop logic circuits.

SR flip-flop based physical unclonable functions for hardware security

A system and method of protecting against control-flow attacks provides two complementary, transparent, and strong security policies for the RTL design at a hardware level. The approach performs static analysis of controller, followed by lightweight instrumentation, such that CFI is enforced in-place and at runtime. The modified controller follows conservative CFG with the help of a monitor.

System and method for protecting against control-flow attacks

A method for reducing circuit sensitivity to single event upsets in programmable logic devices, involves identifying single event upset sensitive gates within a single event upset sensitive sub-circuit of a programmable logic device as determined by the input environment and introducing triple modular redundancy and voter circuits for each single event upset sensitive sub-circuit so identified.

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Tampa, FL, United States of America

Srinivas Katkoori