Applied Materials, Inc.

Micro Materials Inc.

University of California

Centre National De La Recherche Scientifique

Commissariat a L'energie Atomique Et Aux Energies Alternatives

Varian Semiconductor Equipment Associates, Inc.

Applies Materials Inc.

Commissariat À L'énergie Atomique Et Aux Énergies Alternatives

Srinivas D Nemani

Ellie Y Yieh

Qiwei Liang

Ludovic Godet

Li-Qun Xia

Sean S Kang

Chentsau Chris Ying

Adib M Khan

Keith Tatseun Wong

Dmitry Lubomirsky

Mehul B Naik

Abhijit Basu Mallick

Shankar Venkataraman

Douglas A Buchberger, Jr

He Ren

Huixiong Dai

Yi Zheng

Kartik Ramaswamy

Andrew C Kummel

Mei-Yee Shek

Arvind Sundarrajan

Sriskantharajah Thirunavukarasu

Bencherki Mebarki

Jeffrey C Munro

Ying Di Zhang

Michael Wayne Stowell, Jr

Praburam Gopalraja

Nitin K Ingle

Srinivas Gandikota

Daniel J Woodruff

Randy Harris

Christopher S Ngai

Andrew Nguyen

Hua Chung

Pramit Manna

Jeffrey W Anthis

Farhad K Moghadam

Young Seen Lee

Xikun Wang

Gary Fong

Kang Sub Yim

Himanshu Pokharna

Frederic Gaillard

Benjamin Schmiege

Yang Yang

Er-Xuan Ping

Thorsten B Lill

Christopher Dennis Bencher

Anantha K Subramani

Nicolas Posseme

Visweswaren Sivaramakrishnan

Mahendra Pakala

Ashok K Sinha

Timothy Weidman

Susmit Singha Roy

Yixiong Yang

Hao Chen

Seshadri Ramaswami

Douglas Buchberger

Kaushal Kishore Singh

Chen-An Chen

Steven C H Hung

Steven Lane

Olivier Joubert

Shiyu Sun

Shin-Puu Jeng

Kenneth S Collins

Son Van Nguyen

Michael Robert Rice

Jennifer Y Sun

Hou Tee Ng

Juan Carlos Rocha-Alvarez

Anchuan Wang

Nag B Patibandla

Robert Jan Visser

John J Hautala

David Wingto Cheung

Chi-I Lang

James D Carducci

Paul F Ma

Mihaela A Balseanu

Thomas B Brezoczky

Zheng Yuan

Michael Santiago Cox

Wai-Fan Yau

Chando Park

Mukund Srinivasan

Nicolas J Bright

Adolph Miller Allen

Yihong Chen

Simon Yavelberg

Steve G Ghanayem

Vijay Parihar

Olivier Luere

Kurtis Leschkies

Swaminathan T Srinivasan

Steven J Wolf

Yogananda Sarode Vishwanath

Jaesoo Ahn

Tristan Yonghui Ma

Methods and apparatus for forming an integrated circuit structure, comprising: delivering a process gas to a process volume of a process chamber; applying low frequency RF power to an electrode formed from a high secondary electron emission coefficient material disposed in the process volume; generating a plasma comprising ions in the process volume; bombarding the electrode with the ions to cause the electrode to emit electrons and form an electron beam; and contacting a dielectric material with the electron beam to cure the dielectric material, wherein the dielectric material is a flowable chemical vapor deposition product. In embodiments, the curing stabilizes the dielectric material by reducing the oxygen content and increasing the nitrogen content of the dielectric material.

Method for forming integrated circuit structures

Exemplary processing methods may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature within the substrate. The methods may include forming plasma effluents of the silicon-containing precursor and the carbon-containing precursor. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber, forming plasma effluents of the hydrogen-containing precursor, and etching the silicon-and-carbon-containing material from a sidewall of the feature within the substrate. The methods may include providing a nitrogen-containing precursor to the processing region of the semiconductor processing chamber, forming plasma effluents of the nitrogen-containing precursor, and doping the silicon-and-carbon-containing material with nitrogen.

Directional selective fill for silicon gap fill processes

Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.

Directional selective deposition

A method includes depositing a flowable film on a substrate by providing a first input flow, the first input flow including plasma effluents of a first precursor, removing a portion of the flowable film from a sidewall of a feature defined within the substrate to obtain a remaining portion of the flowable film by providing a second input flow, the second input flow including plasma effluents of a second precursor, reducing hydrogen content of the remaining portion of the flowable film to obtain a densified film by providing a third input flow, the third input flow including plasma effluents of a third precursor, and treating the densified film in accordance with a film treatment process.

Forming films with improved film quality

Described herein is a method for performing an atomic layer deposition process to form a silicon doped oxide film on a surface of the substrate. The oxide film may be a hafnium-zirconium oxide film, or a zirconium oxide film. The atomic layer deposition process may include forming the oxide layers and a silicon layer using a hydrogen peroxide as at least one of the precursors used in formation of the oxide layers.

Ultra high-k hafnium oxide and hafnium zirconium oxide films

A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.

Metal based hydrogen barrier

A method and apparatus for depositing a carbon compound on a substrate includes using an inductively coupled plasma (ICP) chamber with a chamber body, a lid, an interior volume, a pumping apparatus, and a gas delivery system and a pedestal for supporting a substrate disposed within the interior volume of the ICP chamber, the pedestal has an upper portion formed from aluminum nitride with an upper surface that is configured to support and heat a substrate with embedded heating elements and a lower portion with a tube-like structure formed from aluminum nitride that is configured to support the upper portion and house electrodes for supplying power to the embedded heating elements of the upper portion, and the pedestal is configured to heat the substrate during deposition of a carbon compound film.

Methods and apparatus for carbon compound film deposition

A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.

Metal oxide resist patterning with electrical field guided post-exposure bake

A high-pressure processing system for processing a substrate includes a first chamber, a pedestal positioned within the first chamber to support the substrate, a second chamber adjacent the first chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, and a gas delivery system configured to introduce a processing gas into the first chamber and to increase the pressure within the first chamber to at least 10 atmospheres while the processing gas is in the first chamber and while the first chamber is isolated from the second chamber.

High pressure wafer processing systems and related methods

The present disclosure generally relates to a substrate processing chamber, a substrate processing apparatus, and a substrate processing method for self-assembled monolayer (SAM) deposition of low vapor pressure organic molecules (OM) followed by further substrate processing, such as atomic layer deposition.

Self-assembled monolayer deposition from low vapor pressure organic molecules

A method for enhancing a photoresist profile control includes applying a photoresist layer comprising a photoacid generator on an underlayer disposed on a material layer, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and drifting photoacid from the photoresist layer to a predetermined portion of the underlayer under the first portion of the photoresist layer.

Photoresist patterning process

Embodiments herein provide methods of plasma treating an amorphous silicon layer deposited using a flowable chemical vapor deposition (FCVD) process. In one embodiment, a method of processing a substrate includes plasma treating an amorphous silicon layer by flowing a substantially silicon-free hydrogen treatment gas into a processing volume of a processing chamber, the processing volume having the substrate disposed on a substrate support therein, forming a treatment plasma of the substantially silicon-free hydrogen treatment gas, and exposing the substrate having the amorphous silicon layer deposited on a surface thereof to the treatment plasma. Herein, the amorphous silicon layer is deposited using an FCVD process. The FCVD process includes positioning the substrate on the substrate support, flowing a processing gas into the processing volume, forming a deposition plasma of the processing gas, exposing the surface of the substrate to the deposition plasma, and depositing the amorphous silicon layer on the surface of the substrate.

Flowable film curing using H2 plasma

Semiconductor systems and methods may include methods of performing selective etches that include modifying a material on a semiconductor substrate. The substrate may have at least two exposed materials on a surface of the semiconductor substrate. The methods may include forming a low-power plasma within a processing chamber housing the semiconductor substrate. The low-power plasma may be a radio-frequency ('RF') plasma, which may be at least partially formed by an RF bias power operating between about 10 W and about 100 W in embodiments. The RF bias power may also be pulsed at a frequency below about 5,000 Hz. The methods may also include etching one of the at least two exposed materials on the surface of the semiconductor substrate at a higher etch rate than a second of the at least two exposed materials on the surface of the semiconductor substrate.

Selective etch using material modification and RF pulsing

Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one embodiment, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a silicon containing precursor to the surface of the substrate, forming a metal containing material selectively on a first material of the substrate, and thermal annealing the metal containing material formed on the substrate.

High selectivity atomic layer deposition process

Growing community of inventors

San Jose, CA, United States of America

Srinivas D Nemani