Intel Corporation

Srikanth Nimmagadda

Mahesh K Kumashikar

Krishnakanth Venkata Sistla

Ankush Varma

Yen-Cheng Liu

Dheeraj R Subbareddy

Gerald S Pasdast

George Zacharias Chrysos

Vedaraman Geetha

Jeffrey D Chamberlain

William R Halleck

Nevine Nassif

Tejpal Singh

Carleton L Molnar

Siva Soumya Eachempati

John R Ayers

Devadatta V Bodas

Andrew Paul Collins

Sambaran Mitra

Rajagopal Narayanan

Sampath Dakshinamurthy

Embodiments may relate to a microelectronic assembly including a substrate; a first die electrically coupled to the substrate, wherein the first die includes a first edge, a second edge, a third edge opposite the first edge, and a fourth edge opposite the second edge; and a second die electrically coupled to the substrate adjacent to the second edge of the first die and communicatively coupled to the first die, wherein the second die includes a fifth edge and a sixth edge opposite the fifth edge, and wherein the fifth edge of the second die is substantially aligned with the first edge of the first die and the sixth edge of the second die extends beyond the third edge of the first die, where the first die includes a processor die and the second die includes an input/output (I/O) die.

Disaggregated die with input/output (I/O) tiles

Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another embodiment, a method to create a hardware processor includes providing a plurality of physically separate dies, and electrically coupling the plurality of physically separate dies together with an interconnect.

Multiple dies hardware processors and methods

Techniques and mechanisms for managing a delivery of power to a resource of an input/output (I/O) interface. In an embodiment, a first link of a plurality of communication links is monitored. Of the plurality of links, a first set of resources of the I/O interface is to support communication only via the first link. One or more other resources of the I/O interface are for supporting communications of another link of the plurality of links. In another embodiment, a resource of the first set of resources is decoupled from a power supply in response to detecting a total number of active lanes of the first link, decoupling.

Apparatus, system and method for gated power delivery to an I/O interface

Growing community of inventors

Bengaluru, India

Srikanth Nimmagadda