Synopsys, Inc.

Imedrix Systems Private Limited

Archpro Design Automation, Inc.

Srikanth Jadcherla

Sriram Kotni

Harsh Chilwal

Prapanna Tiwari

Debabrata Bagchi

Niranjan Rayaprolu

Kishore Ramasamy

Saptarshi Biswas

Nagesh Rangappan

Rajaram Shastri

Venkatakrishna Araveti

Lokesh Kumar Kata

The various embodiments of the present invention disclose a stand-alone, scalable cardiac health monitoring device for 1-6-12 lead ECG data acquisition and a method of working thereof. The method of monitoring cardiac health condition of a patient comprises of receiving, by a cardiac monitoring device, an electrocardiograph (ECG) input data signals from at least two electrodes attached to the patient, performing, a quality check on acquiring the ECG input data signals, processing the acquired ECG input data signals, encrypting the processed ECG input data signals and transmitting the encrypted ECG signals to one or more external user devices over a wireless communication interface. The acquiring the ECG input data signals comprises of integrating a closed loop Right Leg Drive (RLD) as a shield drive and a cable/electrode shield to reduce noise coupling to the ECG input data signals.

Cardiac health monitoring device and a method thereof

Multi-voltage circuit design verification segregates design elements into iso-voltage-rail blocks. Information on cross-over connections between the iso-voltage-rail blocks is obtained. Voltage effects are simulated in the circuit design, and, based on the cross-over information, the simulation results are modified. This yields more accurate results of simulations for multi-voltage circuit designs.

Method and system for verification of multi-voltage circuit design

Systems and methods are disclosed herein which compensate for the loss in design information that occurs when the design is represented in traditional functional descriptions. An automated multiple voltage/power state design process includes creating a plurality of design objects; processing a design definition according to the voltage effects design object; and generating a modified design output such that communication between a plurality of design process steps, wherein the plurality of design process steps include a parsing step, a RTL simulation step, a synthesis step, a gate simulation step, formal verification step, and physical design and verification step in accordance with the voltage effects design object. A system for automating a multiple voltage/power state design process includes a design definition module; a parser module, a RTL simulation module, a synthesis module, a gate simulation module, and a formal verification module wherein the automation of a multiple voltage/power state design process is achieved. The system can include a physical design and verification module coupled to the synthesis module.

Automated multiple voltage/power state design process and chip description system

Automated design process and method with set of syntactic elements compensates for inability to represent voltage island connection of multi-rail cells in RTL source files in traditional design process which inhibits development of design automation methods and causes hardship and risk of failure to simulate, synthesize, perform physical design or formally verify a semiconductor chip design implemented with multi-rail.

Automated design process and method for multi-rail cells and connections

Verification of a design for a multi-voltage circuit which defines a plurality of iso-voltage rail blocks, and which comprises voltage state information for the iso-voltage-rail blocks. Verification includes generating cross-over information regarding a cross-over signal between two iso-voltage-rail blocks, identifying the voltage state relationship between the two iso-voltage-rail blocks based on the voltage state information, and verifying the validity of the cross-over signal based on the determined voltage state relationship.

Method and system for static verification of multi-voltage circuit design

An automated design process and chip description system is disclosed. The automated design process and chip description system compensates for the loss in design information that occurs when the design is represented in traditional functional descriptions. The automated design process includes the steps of processing a design definition according to a functional description and generating a modified design output such that communication between design process steps is seamless. The chip description system comprises a storage element and a functional element, wherein a first design object couples to a second design object such that the coupling uses at least one functional element to access one or more storage elements usable by the chip description system. A data structure for use in a chip description system is also disclosed and comprises a plurality of design objects, a plurality of tool objects interactively coupled with the design objects, a plurality of process objects interactively coupled with the tool objects and the design objects, a plurality of people objects interactively coupled with the process objects, the design objects and the tool objects, wherein the interactive coupling provides improved data management for a plurality of design files.

Growing community of inventors

Campbell, CA, United States of America

Srikanth Jadcherla