Meta Platforms, Inc.

Qualcomm Incorporated

Srikanth Alaparthi

Yunqing Chen

Harikrishna Madadi Reddy

Junqiang Lan

Gaurang Chaudhari

Zhao Wang

Baheerathan Anandharengan

Prahlad Rao Venkatapuram

Xue Hai Fang

Ashish Kumar Mishra

Shiyan Pan

Adrian Stafford Lewis

Kameswara Kishore Sriadibhatla

Tushar Singhal

Prasanth Jampani

A disclosed system may include a hardware distortion data pipeline that may include (1) a quantization module that generates a quantized data set, (2) an inverse quantization module that generates, from the quantized data set, an inverse quantized data set by executing an inverse quantization of the quantized data set, and (3) an inverse transformation module that generates an inversely transformed data set by executing an inverse transformation of the inverse quantized data set. The system may also include a hardware determination pipeline that determines a distortion metric based on the inversely transformed data set and the residual frame data set, and a hardware token rate pipeline that determines, based on the quantized data set, a token rate for an encoding of the residual frame data set via a video encoding pipeline. Various other methods, systems, and computer-readable media are also disclosed.

Hardware pipelines for rate-distortion optimization (RDO) that support multiple codecs

The controller is configured to receive a request that causes transferring of a reference pixel block of a video, wherein the video is being encoded using the reference pixel block. The controller is configured to determine whether the reference pixel block has at least a portion that is outside a frame of the video. In response to the determination of the reference pixel block having at least a portion outside the frame of the video, the controller is configured to cause a portion of the reference pixel block of the video inside the frame of the video to be fetched from a memory storage and stored in a cache storage, pad a remaining missing portion of the reference pixel block of the video outside the frame of the video with padding pixel data to form the reference pixel block, and transfer the reference pixel block in response to the request.

Supporting multiple partition sizes using a unified pixel input data interface for fetching reference pixels in video encoders

A system for calculating token rates for video encoding includes a plurality of different probability lookup tables implemented in hardware, wherein each of the probability lookup tables specifically corresponds to a different prediction mode of a video codec. The system includes an application-specific integrated circuit compute unit. For each candidate prediction mode among the different prediction modes, the application-specific integrated circuit is configured to determine a rate distortion cost (RD Cost) for a video. The application-specific integrated circuit is configured to select one of the plurality of different probability lookup tables that corresponds to the candidate prediction mode and use the selected one of the plurality of different probability lookup tables to calculate a corresponding token rate for the candidate prediction mode. The application-specific integrated circuit is configured to encode the video using a selected one of the different prediction modes determined based on the determined rate distortion costs.

Hardware optimization of rate calculation in rate distortion optimization for video encoding

Techniques and systems are provided for processing video data. For example, an apparatus (e.g., a coding device, such as an encoder) can receive a residual portion of a block of a frame of the video data. The block is a first block in a row of the frame. The apparatus can receive a quantization parameter (QP) value determined for the residual portion of the block, and can determine all transform coefficients of the residual portion of the block have zero values. The transform coefficients can include quantized transform coefficients. The device can compare the received QP value determined for the residual portion of the block to a threshold QP value, and can determine a final QP value for the residual portion of the block based on whether the received QP value is greater than the threshold QP value.

Delta quantization parameter (QP) coding options for video

Techniques are described for performing transformation on video data. A transform circuit may receive M sample values of the video data from a pre-transform buffer, and process the M sample values with N computation units of the transform circuit to generate intermediate values. Processing the M sample values to generate the intermediate values includes feeding back temporary values from output of one or more of the N computation units to input of one or more of the N computation units. The transform circuit may store a first set of the intermediate values in a transpose buffer, and store a second set of the intermediate values in the pre-transform buffer that are to be later retrieved for storage in the transpose buffer.

Transform hardware architecture for video coding

Growing community of inventors

San Diego, CA, United States of America

Srikanth Alaparthi