Intel Corporation

Sridharan Sakthivelu

Boris Ginzburg

Oren Kaidar

Avishay Sharaga

Robert Bruce Bahnsen

Shlomo Avital

Eran Friedlander

Sharon Ben-Porat

Vincent J Zimmer

Kshitij Arun Doshi

Sanjeev N Trika

Toby Opferman

Vikram A Saletore

Vijay Bahirji

Kanivenahalli Govindaraju

Matthew E Tolentino

Krishnaswamy Viswanathan

Gerrit Saylor

Sharon Ben-Porath

Kyle Delehanty

Janardhana Yoga Narasimhaswamy

Systems, apparatuses and methods may provide for technology that identifies a NUMA node, defines a first virtual proximity domain within the NUMA node, and defines a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more OS interface tables.

Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables

Various embodiments are generally directed to an apparatus, method and other techniques to receiving a sequence of transactions, each transaction including a request to write data to a memory device, processing the sequence of transactions, and communicating a response to a host after the sequence of transaction have been completed.

Techniques to achieve ordering among storage device transactions

Durable atomic transactions for non-volatile media are described. A processor includes an interface to a non-volatile storage medium and a functional unit to perform instructions associated with an atomic transaction. The instructions are to update data at a set of addresses in the non-volatile storage medium atomically. The functional unit is operable to perform a first instruction to create the atomic transaction that declares a size of the data to be updated atomically. The functional unit is also operable to perform a second instruction to start execution of the atomic transaction. The functional unit is further operable to perform a third instruction to commit the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

Atomic transactions to non-volatile memory

A processing device features a processing unit, a memory management system, and persistent memory in a persistent memory domain. The processing device provides an enhanced write-back (WB-E) memory space for an application running on the processing unit. The memory management system maps the WB-E memory space to the persistent memory. The application creates WB-E data by executing an instruction to store data to an address in the WB-E memory space. The WB-E data is automatically stored in a cache associated with the processing unit in response to creation of the WB-E data by the application. In response to execution of a commit instruction by the application after the application has created WB-E data for multiple memory addresses, the memory management system automatically ensures that all of the WB-E data for the application has been saved to the persistent memory domain. Other embodiments are described and claimed.

Methods and apparatus for supporting persistent memory

An embodiment of the present invention provides an apparatus, comprising a network adapter configured for wireless communication using more than one technology, and wherein the network adapter is configured to share a plurality of shared hardware components by limiting access to the air to one comm only at given time by designating one comm that owns the shared hardware components as a primary comm and all other comms are secondary comms, wherein the primary comm allows the secondary comms to use the shared hardware components when it is in an idle-state but when the primary comm returns from the idle state, it claims ownership of the shared resources and the secondary comms release the shared resources.

Techniques for management of shared resources in wireless multi-communication devices

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Dupont, WA, United States of America

Sridharan Sakthivelu