International Business Machines Corporation

Sreenivas Makineedi

Douglas J Griffith

Srinivasa Rao Muppala

Anil Kalavakolanu

Gaurav Batra

Mathew Accapadi

William F Quinn

Demetrice Browder

Srinivasa Raghavan M Parthasarathi

Joon Chang

Robert Scott Manning

Evelyn Tingmay Yeung

Shashidhar Bomma

Anand Teerth Desai

Srinivasa M Raghavan

Evan Allen Zoss

Rama Mothey Tenjarla

Emmanuelle Samir Hanna Matta

Ramesh Veeramalla

Shanna Beck

Vidya Makineedi

A method for optimization of low-level memory operations in a distributed memory storage configuration that includes receiving, at a first processor, a request to migrate data from the first processor to a second processor, where the first processor and the second processor comprise a processor and memory, and identifying a command instruction associated with the requested data. The method also includes comparing a first performance metric associated with the first processor to a second performance metric associated with the second processor, where the first performance metric and the second performance metric are associated with executing the command instruction, and where, based on the comparing, a decision to move the command instruction to the second processor is formed, and migrating, responsive to the decision, the data and the command instruction to the second processor.

Optimization of low-level memory operations in a NUMA environment

Embodiments are disclosed for managing heap metadata corruption. The techniques include detecting a metadata corruption error in a first heap disposed in a first region of memory. The techniques also include generating a second heap in a free memory region that is disposed beyond a break value address of a memory allocation system. The techniques further include updating a first entry for the first heap in a heap directory. Additionally, the techniques include generating a second entry for the second heap in the heap directory. The techniques also include processing a call to the memory allocation system for the first heap based on the first entry and the second entry.

Managing heap metadata corruption

Threads of a multithreaded application may be scheduled to different cores and executed in various orders and at various frequencies. Controlling how the threads are scheduled and clock rates of processor cores enables testing multiple possible execution scenarios, which may force previously unknown timing window problems to occur. These timing window problems may then be detected.

Method and technique to find timing window problems

A method for determining affinity domain information based on virtual memory address in a computing system where access to memory is non-uniform includes receiving a request to identify an affinity domain associated with a specified virtual memory address. The affinity domain includes a cluster of processors and memory local to the cluster of processors. A physical memory page corresponding to the specified virtual memory address is determined using a page table mapping a plurality of virtual memory addresses to a plurality of physical addresses. An affinity domain associated with the determined physical memory page is identified. Affinity domain information is provided for the identified affinity domain.

Determining affinity domain information based on virtual memory address

Embodiments include method, systems and computer program products for performing Spectre mitigation on a workload. The method includes starting, by at least one processor of a plurality of processors, a process. The at least one processor determines that the process is a kernel process. The at least one processor determines that an interrupt has occurred in response to the determination that the process is a kernel process. The at least one processor processes the interrupt in response to determining that an interrupt has occurred. The at least one processor suppresses a malware mitigation to be applied to the kernel process in response to interrupt being processed.

Interrupt context switching using dedicated processors

Examples of techniques for deferred disclaim of memory pages are described herein. An aspect includes, based on freeing of a last allocation on a first memory page, placing, by a processor, the first memory page on a deferred disclaim list. Another aspect includes, based on freeing of the last allocation on the first memory page, setting, by the processor, a first hidden flag in a first page table entry corresponding to the first memory page.

Deferred disclaim of memory pages

Technical solutions are described for generating a secured system snapshot of a system. An example computer-implemented method includes receiving an instruction to generate a system snapshot. The system snapshot captures data from a computer executable object loaded in a memory. The method also includes accessing metadata that is associated with the computer executable object from a mapping list. The method also includes capturing the secured system snapshot by. Capturing the secured system snapshot includes determining sensitivity of the computer executable object by comparing the metadata with a predetermined criteria, and excluding a capture of sensitive data from the computer executable object into the system snapshot in response to the metadata of the computer executable object matching the predetermined criteria. The method also includes storing the secured system snapshot.

Dynamically excluding sensitive information from system snapshot

A system and method tests computer software using tracking bits in branch instructions to track portions of the software that have been tested. The tracking bits are bits of a branch programming instruction and may be repurposed hint bits used in the prior art to control pre-fetch of instructions. A branch tracking unit sets bits in a branch instruction of an application or program being tested. The branch tracing unit sets a first bit if a branch is taken and sets a second tracking bit if the branch is not taken. The modified program instructions can be analyzed after running the test inputs to determine if any branches in the software have not been exercised by the test inputs.

Testing computer software using tracking bits

A method for setting a compression ratio for utilizing a compressed memory pool (which is backed by pinned memory) by a virtual memory manager (VMM). Compression of pages of corresponding segments can be tracked as part of a VMM paging algorithm that compresses pages to store in a compressed memory pool. A segment having pages with an average compression ratio below a threshold is identified. The identified segment pages are prevented from utilizing the compressed memory pool resulting in optimizing the use of the compressed memory pool.

Method to improve page out mechanism with compressed memory pools

A method for privilege based memory pinning is provided. The method includes receiving a request to pin an amount of address space memory from a process executing on an operating system. The operating system includes a configurable mode of operation. In mandatory mode, the operating system executes the request to pin address space memory based on the role hierarchy-based privilege level of the requestor process. When the requested amount is greater than the operating system's amount of memory that can be used to pin memory, the operating system fails the request. However, when the operating can satisfy the request from processes having a lower privilege level relative to the requestor process, memory is unpinned from one or more of these processes.

Privilege based memory pinning mechanism

A system and method for setting a compression ratio for utilizing a compressed memory pool (which is backed by pinned memory) by a virtual memory manager (VMM). Compression of pages of corresponding segments can be tracked as part of a VMM paging algorithm that compresses pages to store in a compressed memory pool. A segment having pages with an average compression ratio below a threshold is identified. The identified segment pages are prevented from utilizing the compressed memory pool resulting in optimizing the use of the compressed memory pool.

A server and rack system includes at least one server rack; multiple server slots within the rack; multiple near field communication (NFC) tags; a server located within one of the server slots; an NFC reader within and powered by the server; and an entity that needs to receive locations of servers within racks of the system. Each of the multiple NFC tags is positioned on the rack so as to individually correspond, on a one-to-one basis, with each of the multiple server slots, and each of the NFC tags is programmed with an identifier of the specific rack and slot with which it corresponds, and the NFC reader is positioned such that, when power is supplied to the NFC reader by the server, the NFC reader will read the identifier that corresponds to the slot the server is located within and automatically communicate that identifier to the entity.

Physical server location identification

The present invention provides a computer implemented method for truncating a file in a file system. The file system receives a request to truncate a file to a target size, the file having a first inode. The file system creates a second inode to a transient directory, wherein the second inode holds a plurality of in-progress entries. The file system sets a target size in the first inode. The file system writes a truncate entry to a journal, the truncate entry comprising a predetermined size. The file system truncates the file by up to the predetermined size. The file system determines that the file is above the target size. Responsive to a determination that the file is above the target size, the file system repeats the truncating step and the determining step. Responsive to a determination that the file is not above the target size, the file system applies the in-progress entries from the transient directory.

Growing community of inventors

Round Rock, TX, United States of America

Sreenivas Makineedi