Intel Corporation

Sreenivas Kothandaraman

Prasoonkumar Surti

Abhishek R Appu

Karthik Vaidyanathan

Stephen Junkins

Karol A Szerszen

Michael Doyle

Srihari Pratapa

Adam T Lake

Carsten Benthin

John H Feit

Gabor Liktor

Sven Woop

Joshua Barczak

Holger Gruen

Won-Jong Lee

William Hux

Bret G Alfieri

Mohamed Farook

Examples described herein relate to a manner of determining a number of bits to encode compression data. Some examples include: compressing pixel data of a region of pixels in a frame; determining a number of bits associated with at least two partitions; utilizing the determined number of bits to encode residual values generated from the compressing the pixel data; and storing the encoded residual values. In some examples, the at least two partitions comprise a first partition and a second partition. Some examples include: encoding residuals in the first partition using a number of bits associated with the first partition and encoding residuals in the second partition using a number of bits associated with the second partition. Some examples include: determining a distribution of bins of residuals, wherein each different bin represents a number of bits used to encode a residual value and determining a midpoint of a total number of residuals as a bin that stores a residual that is approximately 50 percentile of the total number of residuals of the distribution.

Memory allocation technologies for data compression and de-compression

Interleaving of variable bitrate streams for GPU implementations is described. An example of an apparatus includes one or more processors including a graphic processor, the graphics processor including a super-compression encoder pipeline to provide variable width interleaved coding; and memory for storage of data, wherein the graphics processor is to perform parallel dictionary encoding on a bitstream of symbols one of multiple workgroups, the workgroup to employ a plurality of encoders to generate a plurality of token-streams of variable lengths; create a histogram including at least tokens from the plurality of token-streams for the workgroup to generate an optimized entropy code; entropy code each of the plurality of token-streams for the workgroup into an encoded bitstream; and variably interleave the encoded bitstreams to generate an interleaved bitstream and bookkeep a size of the interleaved bitstream.

Interleaving of variable bitrate streams for GPU implementations

Variable width interleaved coding for graphics processing is described. An example of an apparatus includes one or more processors including a graphic processor; and memory for storage of data including data for graphics processing, wherein the graphics processor includes an encoder pipeline to provide variable width interleaved coding and a decoder pipeline to decode the variable width interleaved coding, and wherein the encoder pipeline is to receive a plurality of bitstreams from workgroups; perform parallel entropy encoding on the bitstreams to generate a plurality of encoded bitstreams for each of the workgroups; perform variable interleaving of the bitstreams for each workgroup based at least in part on data requirements for decoding received from the decoder pipeline; and compact outputs for each of the workgroups into a contiguous stream of interleaved data.

Variable width interleaved coding for graphics processing

Apparatus and method for efficient graphics processing including ray tracing. For example, one embodiment of a graphics processor comprises: execution hardware logic to execute graphics commands and render images; an interface to couple functional units of the execution hardware logic to a tiled resource; and a tiled resource manager to manage access by the functional units to the tiled resource, a functional unit of the execution hardware logic to generate a request with a hash identifier (ID) to request access to a portion of the tiled resource, wherein the tiled resource manager is to determine whether a portion of the tiled resource identified by the hash ID exists, and if not, to allocate a new portion of the tiled resource and associate the new portion with the hash ID.

Apparatus and method for efficient graphics processing including ray tracing

Apparatus and method for compression of acceleration structure build data in a ray tracing implementation. For example, one embodiment of an apparatus comprises: traversal hardware logic to traverse rays through a graphics scene comprising a plurality of primitives; and an acceleration data structure processing unit comprising: a bounding box compressor to compress a set of bounding boxes to generate a plurality of bounding box compression blocks, and an index compressor to compress a set of indices to generate a plurality of index compression blocks, and an acceleration data structure builder for constructing acceleration structures based on bounding box compression blocks and index compression blocks.

Apparatus and method for compressing ray tracing acceleration structure build data

An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.

Unified memory compression mechanism

Growing community of inventors

Sammamish, WA, United States of America

Sreenivas Kothandaraman