Applied Materials, Inc.

Sree Rangasai V Kesapragada

Mehul B Naik

He Ren

Yong Cao

Yana Cheng

Paul F Ma

Yuichi Wada

Yueh Sheng Ow

Tuck Foong Koh

Nuno Yen-Chu Chen

Felix Deng

Clinton Goh

David P Thompson

Xianmin Tang

Deenesh Padhi

Mei-Yee Shek

Kevin Vincent Moraes

Srinivas Guggilla

Weifeng Ye

Mei Yin Chang

Sang Ho Yu

Jacqueline S Wrench

Jiang Lu

Nobuyuki Sasaki

Jing Zhou

Fuqun Grace Vasiknanonte

Methods and apparatus for cleaving a substrate in a semiconductor chamber. The semiconductor chamber pressure is adjusted to a process pressure, a substrate is then heated to a nucleation temperature of ions implanted in the substrate, the temperature of the substrate is then adjusted below the nucleation temperature of the ions, and the temperature is maintained until cleaving of the substrate occurs. Microwaves may be used to provide heating of the substrate for the processes. A cleaving sensor may be used for detection of successful cleaving by detecting pressure changes, acoustic emissions, changes within the substrate, and/or residual gases given off by the implanted ions when the cleaving occurs.

Methods and apparatus for cleaving of semiconductor substrates

In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.

Methods for depositing dielectric barrier layers and aluminum containing etch stop layers

Embodiments of the invention provide methods of processing a substrate having a stack of spaced oxide layers with gaps between the oxide layers. A metallic nucleation layer is formed in the gaps and a cobalt film is deposited on the nucleation layer to form wordlines.

Deposition of cobalt films with high deposition rate

An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber. The substrate has an exposed copper surface and an exposed low-k dielectric surface. A metal layer is formed over the copper surface but not over the low-k dielectric surface. A metal-based dielectric layer is formed over the metal layer and the low-k dielectric layer.

Dielectric/metal barrier integration to prevent copper diffusion

Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.

Methods for forming passivation protection for an interconnection structure

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Union City, CA, United States of America

Sree Rangasai V Kesapragada