3com Corporation

Hewlett-packard Development Company, L.p.

Spiro Poulis

John P Evans

Shayne Messerly

Gerald A Wilson

Ned Plasson

David M Arnesen

Garn H Morrell

Jeffrey A Hanline

Brent C Higbee

Shane Messerly

Matt Smith

The present invention discloses circuits for isolating and attenuating signals generated by a telephone network. In disclosed embodiments, a metering pulse signal is isolated from the terminals of the connecting device, and then attenuated with an impedance that is synthesized with a programmable digital signal processor. Embodiments also utilize the digital signal processor to synthesize a termination impedance for the connecting device. The termination impedance matches closely the characteristic impedance of the network, so as to minimize wave reflections and the like.

Attenuation and termination circuit using impedance synthesis

The present invention synthesizes a prescribed impedance. The impedance is synthesized by generating a current having a value substantially equal to a voltage divided by a prescribed impedance. Sensing the line voltage and converting that sensed line voltage to its digital equivalent accomplish this first step. The digital line voltage is processed by a factor related to the prescribed impedance to produce an output voltage that has a value substantially equal to the sensed voltage divided by the prescribed impedance. The output voltage controls a voltage to current converter that generates the appropriate current across the points or terminals where the line voltage was measured. Thus, the prescribed impedance is generated across these points or terminals because the line voltage divided by the generated current is substantially equal to the prescribed impedance.

Systems and methods for impedance synthesis

The present invention provides apparatus and methods for attenuating signals received from a source over a data transmission line, having an unknown resistance, to achieve optimized signals in various data terminal and data communications equipment. In a preferred embodiment, a resistor network is operably coupled between the transmission line and a means for processing the signal, such as a digital processor, an ADC and a DAC. The resistor network comprises a termination resistor that is associated with a termination voltage, a variable resistor and another resistor. During use, a switch is operably positioned between a plurality of switch positions so that two voltage measurements will lead to the determination of the voltage of the source and the termination voltage within the resistor network. Once these voltages are known, the unknown resistance can be estimated. Thereafter, the length of the transmission line may be determined because of known resistance-per-unit-distance characteristics of the transmission line. In response to knowing this length, the digital processor selects a desired resistance value for the variable resistor so that, upon adjustment of the variable resistor by the DAC, the signal becomes a largest-possible input at the ADC.

Data signal attenuator and systems and methods for using same

Systems and methods for embedding, detecting and extracting access information from a dial tone of a private branch exchange system. The access information is embedded at the zero crossings of the dial tone. This has a minimal effect on the audible quality of the dial tone. A connecting device, such as a modem, receives the altered dial tone having access information. The access information is extracted by the connecting device and displayed to a user. The access information is automatically downloaded by the connecting device upon connecting to the private branch exchange without interaction from a user by having the connecting device go off hook such that the dial tone is received. The connecting device detects, extracts and displays the access information. After the access information is displayed to a user, the connecting device can await further user interaction or immediately make use of the access information.

System and method for embedding digital information in a dial tone signal

Provided is a circuit for terminating a ring signal of a telephone network. A physical impedance is combined with a synthesized impedance to produce an impedance having a magnitude substantially equal to the ring termination impedance of a telephone network. The synthesized impedance is created by generating a current from a voltage controlled current source. By controlling the magnitude of the generated current, the magnitude of the synthesized impedance is also controlled. Because the specified ring termination impedances are known, a satisfactory impedance can be synthesized which results in the ring signal being properly terminated.

Synthesized telephone line ring signal impedance termination

The present invention provides a line termination circuit for matching the characteristic impedance of a transmission line, or more generally, a network. The present invention receives the voltage as present on the transmission line and attenuates it such that circuit components rated for lower voltages may be used to produce the reflected impedance. The attenuated voltage is placed across a scaled impedance which results in a reflected impedance substantially equal to the characteristic impedance of the transmission line. The line termination circuit uses a feedback loop to reflect the ground referenced scaled impedance across the transmission lines. The circuit generates a current having a value of one over the characteristic impedance of the network, which ensures that the reflected impedance, from the network, is substantially equal to the characteristic impedance of the network.

System and method for terminating a line by reflecting a scaled impedance

An apparatus and method for transferring data between a host system and a communication network via a communication module wherein the communication module presents a UART-like interface to the host system. The communication module is comprised of an emulated UART module, a digital signal processor (DSP), and a DSP memory. The emulated UART provides a compatible UART-like front end for interlacing directly with a host system and additionally performs direct memory access-like (DMA) functions enabling the direct transfer of transmit data between the host system and DSP memory that is directly accessible by the DSP for modulation and/or other processing such as data compression. The emulated UART module additionally provides performance features such as adjustable buffering quantity thresholds for triggering interrupts to either the host system or DSP, and pacing features that provide the host system with the appearance and performance of a serialized UART.

UART with direct memory access buffering of data and method therefor

A power management circuit for use in a terminal interface device such as a modem which converts available power from a terminal or host device such as a computer into usable standby power for use when the terminal interface device is non-operational. The power management circuit is additionally comprised of a voltage regulator which, when a terminal interface device becomes operational, is enabled and regulates available voltage and current into usable power as available from the interfacing communication network. The preferred embodiment of the power management circuit is further comprised of a programmable hold current generator which enables a terminal interface device incorporating the power management circuit to be compatible with multiple communication networks having diverse hold current specifications. The use of power available from the communication network in generating the operational voltage greatly reduces interference injected onto the communication network.

Telephone line-assist powered apparatus with programmable hold current

A system and circuit is provided for digitally synthesizing the impedance of a transfer function. The impedance of the transfer function is digitally synthesized by generating a current that, when combined with an input voltage, results in the impedance of the transfer function. This is accomplished by sensing the input signal and processing it with a generator or multiplier such that a voltage is produced. The produced voltage controls a current source and creates a current having a value equal to the inverse of the transfer function impedance. The sensed or input voltage divided by the generated current is equal to the impedance of the transfer function. In this manner, many different transfer functions can be digitally synthesized without having to design an alternate circuit.

Transfer function implementation using digital impedance synthesis

A method and apparatus for interconnecting via a serial bus a master processor and a co-processor having directly interfaceable parallel interfaces thereby accommodating the remote location of the co-processor from the master processor. The master processor interfaces with a serial bus interface for converting the parallel interface of the master processor into a serial interface forming a serial bus including a serial data out signal, a serial data in signal, a serial clock signal and a frame sync signal. The serial bus interfaces with the remote module having the co-processor located therein. The serial bus interfaces directly with an interface controller for converting the serial information back to a parallel format compatable with the requirements of the co-processor's parallel interface. The interface controller is further capable of generating control signals such as resets and general purpose outputs when directed by the master processor and reading status of the co-processor when also directed by the master processor. Testing functionality is also included for specific incorporation of an ISDN-specific I/O interface device functioning as the co-processor.

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West Jordan, UT, United States of America

Spiro Poulis