Sima Technologies, Inc.

Xilinx, Inc.

Spenser Don Gilliland

Nishit Harshad Shah

Srivathsa Dhruvanarayan

Kavitha Prasad

Reed Kotler

Moenes Zaher Iskarous

Yogesh Laxmikant Chobe

Sedny S J Attia

Raymond Kong

Ashish Gupta

Sonal Santan

Jun Liu

Bradley L Taylor

Brian S Martin

Yenpang Lin

Fernando J Martinez Vallina

Ambujavalli Kesavan

Andrew Mirkis

Michael D Allen

An example method of managing a plurality of hardware accelerators in a computing system includes executing workload management software in the computing system configured to allocate a plurality of jobs in a job queue among a pool of resources in the computer system; monitoring the job queue to determine required hardware functionalities for the plurality of jobs; provisioning at least one hardware accelerator of the plurality of hardware accelerators to provide the required hardware functionalities; configuring a programmable device of each provisioned hardware accelerator to implement at least one of the required hardware functionalities; and notifying the workload management software that each provisioned hardware accelerator is an available resource in the pool of resources.

Dynamic load balancing and configuration management for heterogeneous compute accelerators in a data center

A compiler receives a description of a machine learning network and generates a computer program that implements the machine learning network. The computer program includes statically scheduled instructions that are executed by a mesh of processing elements (Tiles). The instructions executed by the Tiles are statically scheduled because the compiler can determine which instructions are executed by which Tiles at what times. For example, for the statically scheduled instructions, there are no conditions, branching or data dependencies that can be resolved only at run-time, and which would affect the timing and order of the execution of the instructions.

Machine learning network implemented by statically scheduled instructions, with system-on-chip

Machine learning network implemented by statically scheduled instructions, with MLA chip

Machine learning network implemented by statically scheduled instructions, with compiler

Managing an accelerator may include responsive to determining a first container including a first configuration file and a second configuration file, caching, using a host processor, the second configuration file within a local memory of the host processor. The first configuration file may be provided, using the host processor, to a device of the accelerator. Responsive to a configuration event, the host processor may provide the cached second configuration file from the local memory to the device of the accelerator.

Boot and configuration management for accelerators

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San Jose, CA, United States of America

Spenser Don Gilliland