Advanced Micro Devices Corporation

Spencer A Peterson

Michael P Taborn

Richard Jacob Wilcox

A method and apparatus for capturing the internal state of an integrated circuit (IC) for second and higher order speedpath-induced failures. The method includes stretching one or more cycles of an internal clock signal in order to mask a first order speedpath-induced failure (SIF), wherein the internal clock signal is restored to operating at a normal speed subsequent to masking the first order SIF. The internal clock signal may be stopped at a cycle corresponding to a higher order SIF. After stopping the internal clock signal, test output data may be loaded into a scan chain. The method may also be used in conjunction with a laser or other device for other test enhancements.

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Austin, TX, United States of America

Spencer A Peterson