Qualcomm Incorporated

Sparsh Singhai

Subbarao Palacharla

Kedar Bhole

Laurent Rene Moll

Jean-Jacques Lecler

George Patsilaras

Alain Artieri

Girish Bhat

Shyamkumar Thoziyoor

Samir Vijay Ginde

Jeffrey Shabel

Rakesh Kumar Gupta

Christophe Avoinne

Vipul Gandhi

Isaac Berk

Gopi Tummala

Syed Minhaj Hassan

Carlo Spitale

Luigi Vinci

Integrated circuits (ICs) employ subsystem shared cache memory for facilitating extension of low-power island (LPI) memory. An LPI subsystem and primary subsystems access a memory subsystem on a first access interface in a first power mode and the LPI subsystem accesses the memory subsystem by a second access interface in the low power mode. In the first power mode, the primary subsystems and the LPI subsystem may send a subsystem memory access request including a virtual memory address to a subsystem memory interface of the memory subsystem to access either data stored in an external memory or a version of the data stored in a shared memory circuit. In the low-power mode, the LPI subsystem sends an LPI memory access request including a direct memory address to an LPI memory interface of the memory subsystem to access the shared memory circuit to extend the LPI memory.

Integrated circuits (IC) employing subsystem shared cache memory for facilitating extension of low-power island (LPI) memory and related methods

Data caching may include storing data associated with DRAM transaction requests in data storage structures organized in a manner corresponding to the DRAM bank, bank group and rank organization. Data may be selected for transfer to the DRAM by selecting among the data storage structures.

Dram-aware caching

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San Diego, CA, United States of America

Sparsh Singhai