E.i. Dupont De Nemours and Company

Sounak Banerji

Karl Hartmann Dietz

William J Borland

Attiganal Narayanaswamy Sreeram

Daniel Irwin Amey, Jr

David Ross McGregor

Brian C Auman

G Sidney Cox

Kuppsuamy Kanakarajan

The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.

Power core devices and methods of making thereof

The present invention relates to methods of forming multilayer structures and the structures themselves. In one embodiment, a method of forming a multilayer structure comprises: providing a dielectric composition comprising paraelectric filler and polymer wherein the paraelectric filler has a dielectric constant between 50 and 150; applying the dielectric composition to a carrier film thus forming a multilayer film comprising a dielectric layer and carrier film layer; laminating the multilayer film to a circuitized core wherein the dielectric layer of the multilayer film is facing the circuitized core; and removing the carrier film layer from the dielectric layer prior to processing; applying a metallic layer to the dielectric layer wherein the circuitized core, dielectric layer and metallic layer form a planar capacitor; and processing the planar capacitor to form a multilayer structure.

Methods for forming multilayer structures

The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.

Power core devices

The present invention relates to a multi-layer laminate having a low glass transition temperature polyimide layer, a high glass transition temperature polyimide layer, and a conductive layer. The low glass transition temperature polyimide layer is synthesized by contacting an aromatic dianhydride with a diamine component, the diamine component comprising about 50 to about 90 mole % aliphatic diamine (the remainder being aromatic diamine) having the structural formula HN&#x2014;R&#x2014;NHwherein R is hydrocarbon from Cto C. The low glass transition polyimide is an adhesive and has a glass transition temperature in the range of from 150&#xb0; C. to 200&#xb0; C. The high glass transition temperature polyimide layer has a glass transition temperature above the low glass transition temperature polyimide layer and is a thermoset polyimide. A multi-layer-layer substrate of the present invention has the high glass transition temperature polyimide layer positioned between the conductive layer and the low glass transition polyimide, or optionally contains an additional low glass transition temperature polyimide positioned between the conductive layer and the high glass transition polyimide layer.

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Cary, NC, United States of America

Sounak Banerji