Intel Corporation

Soumyanath Krishnamurthy

Hasnain Lakdawala

Ram K Krishnamurthy

Ashoke Ravi

Greg F Taylor

Arijit Raychowdhury

Yee (William) Li

Ofir Degani

Georgios Yorgos Palaskas

Atila Alvandpour

Masoud Sajadieh

Keith A Holt

Richard B Nicholls

Stanley K Ling

A thermal sensor is provided that includes a front-end component, an analog-to-digital converter and a digital backend. The front-end component including an array of current sources, a dynamic element matching (DEM) device, an analog chopper and two diodes to sense temperatures on the die. The front-end component to provide analog signals at two output nodes based on currents through the two diodes. The analog-to-digital converter to receive the analog signals from the front-end component and to provide an output signal. The digital backend to receive the output signal from the analog-to-digital converter and to provide a calculated temperature.

Thermal sensor device

Embodiments provide apparatuses, systems, and methods to convert an analog signal input into a sigma-delta digital output at a high sampling rate and correct for noise components of the digital output. An analog filter coupled to a sigma-delta converter accepts a noise-shaped analog signal from the sigma-delta converter to attenuate signal components of the noise-shaped analog signal at a plurality of folding frequencies associated with a sampling rate of a low-speed Analog-To-Digital (ADC) to produce a filtered output. The low-speed ADC is coupled to an output of the analog filter and samples the filtered output of the analog filter at a sampling rate slower than the high sample rate to output an ADC digital output. Other embodiments may be described and claimed.

Sigma-delta converter noise cancellation

A multichip transceiver operates as part of a multiple-input multiple-output communication system. First receiver circuitry on a first integrated circuit processes radio-frequency (RF) signals received from a first signal source, and second receiver circuitry on a second integrated circuit processes RF signals received from a second signal source. Clock-signal generating circuitry provides clock signals through phase-matched paths to the first and second receiver circuitry.

Multiple-input multiple-output multichip transceiver with correlated clock signals

Film bulk acoustic resonators (FBARS) have resonant frequencies that vary with manufacturing variations, but tend to be matched when in proximity on an integrated circuit die. FBAR resonant frequency is determined using a fractional-N synthesizer and comparing phase/frequency of an output signal from the fractional-N synthesizer to a reference. The reference may be derived from a low frequency crystal oscillator, an external signal source, or a communications signal.

Film bulk acoustic resonator calibration

A signal driver circuit uses a single power supply to provide differential low voltage swing signals for use in an integrated circuit. The driver reduces interconnect voltage swing and power consumption, while improving the speed performance of the interconnect. The driver includes series coupled drive transistors to provide differential signals on integrated circuit interconnects. The driver circuit can include circuitry to place the interconnects in a tri-state condition to allow for shared interconnects. An integrated circuit, such as a processor, includes first and second differential interconnects, a receiver circuit connected to the first and second differential interconnects for detecting a differential voltage provided thereon, and a driver circuit connected to the first and second differential interconnects for providing the differential voltage.

Tristate driver for integrated circuit in interconnects

An integrated circuit (IC) bus architecture is disclosed. The bus architecture includes a receiver for fast on-chip signal transmission. The receiver includes a first gate device having one terminal connected to a voltage source and a gate terminal connectable to receive a sense signal. A second gate device includes one terminal connected to another terminal of the first gate device, a gate terminal connectable to receive the sense signal and another terminal serving as an input terminal of the receiver and connectable to an interconnect bus to receive input signals from other components on the IC chip. The receiver also includes a third gate device having one terminal connected to a voltage source and another terminal serving as an output terminal of the receiver and connected to the other terminal of the first gate device. The receiver further includes an inverter having an input terminal connected to the output of the receiver and having an output terminal connected to a gate terminal of the third gate device. The input of the receiver is capable of being pre-discharged to a low signal and the output of the receiver is capable of being pre-charged to a high signal for substantially instantaneous transmission of input signals received by the receiver.

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Portland, OR, United States of America

Soumyanath Krishnamurthy