Thomson-csf Semiconducteurs Specifiques

Thomson-csf

Sophie Caranhac

Yves Thenoz

Pierre Blanchard

Jean-Louis Coutures

Driving-gate charge-coupled device

The disclosure relates to charge-coupled devices taking the form of shift registers and, more specifically, to those working in the MPP (Multi-Pinned Phase) mode, i.e. with high negative polarisation of the electrodes during the phases of waiting or of integration of integration of the photosensitive charges. These registers use a potential barrier created by a P type compensating implantation in a zone 16 located beneath a first electrode of each stage of the register. This barrier separates the stages from one another. To increase the charge storage capacity during the storage phase and the charge transfer capacity during the transfer, it is provided that the compensating implantation of the zone 16 will extend beneath only one part (and not the totality) of the first electrode of each stage of the register. Application to photosensitive image sensors, analog delay lines, charge-coupled analog memories, working in MPP mode during the waiting phases to limit losses of information due to the dark current. FIG. 4.

CCD type semiconductor device

A protection circuit against the electrostatic discharges that could appear at the terminals of a circuit, wherein said protection circuit comprises a first transistor made in a well whose potential is a floating potential and enabling the value of the discharge voltage to be limited to a value equal to minus the value of the threshold voltage of said first transistor and a second transistor made in a well whose potential is a floating potential and enabling the value of the discharge voltage to be limited to a value equal to the value of the threshold voltage of said second transistor. The disclosure can be applied to MOS technology integrated circuits.

Growing community of inventors

Grenoble, France

Sophie Caranhac