Commissariat a L'energie Atomique Et Aux Energies Alternatives

Stmicroelectronics (Crolles 2) Sas

Sophie Bernasconi

Christelle Charpin-Nicolle

Aomar Halimaoui

Florian Pebay-Peyroula

Anthony De Luca

A method for securing an integrated circuit upon making it includes the steps of delimiting said integrated circuit into a first so-called standard zone and into a second so-called security zone, and randomly misaligning in said security zone between a lower level of interconnection holes and an upper level of interconnection holes generating the formation of an interconnection structure having a random distribution of electrical contact and non-contact points. Also described is a secured integrated circuit obtainable using such a method.

Method for securing an integrated circuit upon making it

The present invention relates to a memory device comprising a first electrode (), a second electrode () and an active portion that can change conductive state, positioned between a first face of the first electrode () and a first face of the second electrode (). The first electrode () comprises an upper portion forming the first face of the first electrode (). At least one out of the upper portion and the active portion that can change conductive state comprises a porous layer ().

Method of manufacturing a memory device

A method for manufacturing a memory cell includes forming a stack of layers comprising a first electrode and a dielectric layer, and forming a second electrode. Forming the second electrode includes depositing the second electrode on the dielectric layer, and defining the contour of the second electrode in such a way that the second electrode forms a protruding element above the dielectric layer having inclined flanks, the angle between the flanks of the second electrode forming an acute angle with the plane wherein the dielectric layer mainly extends.

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Laval, France

Sophie Bernasconi