Electronics and Telecommunications Research Institute

Soonwon Jung

Byoung Gon Yu

Young Sam Park

Sung Min Yoon

Sang Hoon Cheon

Seung Yun Lee

Seung-Yun Lee

Yong-Joo Kim

Provided is a non-volatile programmable device including a first terminal, a first threshold switching layer connected to part of the first terminal, a phase change layer connected to the first threshold switching layer, a second threshold switching layer connected to the phase change layer, a second terminal connected to the second threshold switching layer, and third and fourth terminals respectively connected to a side portion of the phase change layer and the other side portion opposite to the side portion of the phase change layer.

Non-volatile programmable device including phase change layer and fabricating method thereof

Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.

Programmable logic block of FPGA using phase-change memory device

Growing community of inventors

Daejeon, South Korea

Soonwon Jung