Samsung Electronics Co., Ltd.

Soonoh Park

Young-Lim Park

Dongho Ahn

Gyuhwan Oh

Sechung Oh

Dong-Hyun Im

Eun-Hee Cho

Yong Jong Park

Jongchul Park

Junghwan Park

Woojin Kim

Sangin Lee

Joonmyoung Lee

Sang Hwan Park

Chanjin Park

Sugwoo Jung

Sangyong Kim

Keewon Kim

Jonguk Kim

Hyungjoon Kwon

Jung Moo Lee

Jinil Lee

Minah Kang

A semiconductor memory device includes a selection transistor on a semiconductor substrate, a lower contact plug connected to a drain region of the selection transistor, and a magnetic tunnel junction pattern on the lower contact plug, the magnetic tunnel junction pattern including a bottom electrode in contact with the lower contact plug, the bottom electrode being an amorphous tantalum nitride layer, a top electrode on the bottom electrode, first and second magnetic layers between the top and bottom electrodes, and a tunnel barrier layer between the first and second magnetic layers.

Semiconductor memory device

The inventive concepts provide magnetic memory devices and methods forming the same. The method includes sequentially forming a first magnetic conductive layer and a capping layer on a substrate, patterning the capping layer and the first magnetic conductive layer to form a first magnetic conductive pattern and a capping pattern, forming an interlayer insulating layer exposing the capping pattern on the substrate, removing the capping pattern to expose the first magnetic conductive pattern, forming a tunnel barrier layer and a second magnetic conductive layer on the first magnetic conductive pattern and the interlayer insulating layer, and patterning the second magnetic conductive layer and the tunnel barrier layer to form a second magnetic conductive pattern and a tunnel barrier pattern.

Magnetic memory devices and methods of forming the same

Provided are a magnetic memory device and a method of fabricating the same. The device may include a magnetic tunnel junction including a lower magnetic structure, an upper magnetic structure, and a tunnel barrier interposed therebetween. The tunnel barrier may have a width greater than that of the lower magnetic structure.

Magnetic device and method of fabricating the same

A magnetic memory device may include a substrate and a magnetic tunnel junction memory element on the substrate. The magnetic tunnel junction memory element may include a reference magnetic layer, a tunnel barrier layer, and a free magnetic layer. The reference magnetic layer may include a first pinned layer, an exchange coupling layer, and a second pinned layer. The exchange coupling layer may be between the first and second pinned layers, and the second pinned layer may include a ferromagnetic layer and a non-magnetic layer. The second pinned layer may be between the first pinned layer and the tunnel barrier layer, and the tunnel barrier layer may be between the reference magnetic layer and the free magnetic layer.

Memory devices and methods of manufacturing the same

A method of forming a memory device includes forming a first interlayer insulating layer on a semiconductor substrate, forming a first electrode in the first interlayer insulating layer, the first electrode having a top surface of a rectangular shape extending in a first direction, and forming a variable resistance pattern on the first electrode, the variable resistance pattern having a bottom surface of a rectangular shape extending in a second direction crossing the first direction, the bottom surface of the variable resistance pattern contacting the first electrode, wherein the area of contact between the lower electrode and the variable resistance pattern is substantially equal to a multiplication of a minor axis length of a top surface of the first electrode and a minor axis length of a bottom surface of the variable resistance pattern.

Variable resistance memory device and methods of forming the same

A semiconductor device includes an electrode having a metal silicide layer and a metal alloy layer, and a data storage element formed on the electrode. The metal silicide layer has a concave surface to correspond to a convex surface of the metal alloy layer such that the concave surface of the metal silicide layer and the convex surface of the metal alloy layer form a curved boundary.

Method of forming a semiconductor device having a metal silicide and alloy layers as electrode

An ohmic contact structure for connection of a metal electrode to a highly integrated semiconductor device and a method for making the same. A contact hole is selectively formed in an insulating layer. A contact structure of a hetero-junction of Ge and Si.sub.1-x Ge.sub.x whose bandgap is lower than that of the underlying substrate material is formed between the interface of the metal electrode and the semiconductor substrate. The hetero-junction structure minimizes stress and strain between the metal electrode and the semiconductor substrate. The ohmic contact structure lowers the resistance of electronic lines and increases the reliability of integrated semiconductor devices.

Ohmic contact structure of a highly integrated semiconductor device

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Suwon-si, South Korea

Soonoh Park