Samsung Electronics Co., Ltd.

Soon-Young Kim

Young-Joon Choi

Jong-Hwa Kim

June Hyung Lee

Chan-Kyung Kim

Young-Nam Hwang

Jin-Min Kim

Sang-Kil Lee

In-Young Kim

Seijin Kim

Oh-suk Kwon

Jae-Hong Min

Provided is a memory device that includes a memory bank including a plurality of memory cells arranged in a region where a plurality of word lines and a plurality of bit lines of the memory device intersect each other, a sense amplifier configured to amplify a signal transmitted through selected bit lines among the plurality of bit lines, and an arithmetic circuit configured to receive a first operand from the sense amplifier, receive a second operand from outside the memory device, and perform an arithmetic operation by using the first operand and the second operand, based on an internal arithmetic control signal generated in the memory device.

Memory device including arithmetic circuit and neural network system including the same

An operating method for a memory system provides a ready/busy signal from a nonvolatile memory device indicating an idle state or a busy state to a controller. The controller generates a next command but transfers the next command to the nonvolatile memory device in response to the ready/busy signal and the idle verse busy state of a target plane among multiple planes of the nonvolatile memory device.

Nonvolatile memory device, memory system and controller operating method

In one aspect, a non-volatile memory is provided which includes a plurality of m-bit non-volatile memory cells and a plurality of n-bit non-volatile memory cells, where 1&#x2266;m&#x3c;n, and a voltage generator which generates a first read voltage applied to non-selected m-bit non-volatile memory cells and a second read voltage applied to non-selected n-bit non-volatile memory cells, wherein the first read voltage is less than the second read voltage.

Non-volatile memory generating different read voltages

A method and device for copying-back data in a multi-chip flash memory device having first and second memory chips. The method may include reading first source data from a first source region of one of the memory chips; programming the first source data into a target region included in one of the memory chips and reading second source data from second source region of the other memory chip different from the memory chip including the target region. Reading the second source data may be carried out while programming the first source data.

Multi-chip flash memory device and copy-back method thereof

A flash memory device includes a plurality of data pads to receive data from an adjacent plurality of data pins. A signal generation circuit generates a plurality of selection signals responsive to bit organization and package signals. A buffer circuit buffers the data from the plurality of data pads. An input switch receives the data from the buffer circuit and transmits the data to the data lines responsive to the selection signals. And an output switch provides data to the buffer circuit responsive to the selection signals.

Growing community of inventors

Hwaseong-si, South Korea

Soon-Young Kim