Samsung Electronics Co., Ltd.

Ovonyx Inc.

Soon-Oh Park

Hideki Horii

Dong-Jun Seong

Jeong-Hee Park

Dong-Ho Ahn

Zhe Wu

Jin-Woo Lee

Young-Nam Hwang

Dong-ho Ahn

Jung-hwan Park

Gwan-Hyeob Koh

Young-Lim Park

Jang-Eun Lee

Se-Ho Lee

Bong-jin Kuh

Yong-Ho Ha

Yoon-jong Song

Ji-Hye Yi

Su-Jin Ahn

Hyeong-Geun An

Gyu-Hwan Oh

Sung-lae Cho

Kyung-Chang Ryoo

Chang-Wook Jeong

Jong-Uk Kim

Hee-Ju Shin

Sang-Don Nam

Choong-Man Lee

Young-Hyun Kim

Jung-Moo Lee

Su-Youn Lee

Jin-ho Oh

Seol Young Choi

Sug-woo Jung

Stephen J Hudgens

Jin-il Lee

Sung-Ho Eun

Gi-Tae Jeong

Chan-Jin Park

Jong-Chan Shin

Han-Bong Ko

Hong-sik Jeong

Hyun-Su Ju

Sun-Jung Kim

Carl Schell

Jonathan D Maimon

Chang-Su Kim

Soo-Doo Chae

Jin-Ho Oh

Dong-jun Seong

Heo-ju Shin

Hyeung-Geun An

A method of manufacturing a memory device includes sequentially forming and then etching a preliminary selection device layer, a preliminary middle electrode layer, and a preliminary variable resistance layer on a substrate, thereby forming a selection device, a middle electrode, and a variable resistance layer. At least one of a side portion of the selection device or a side portion of the variable resistance layer is removed so that a first width of the middle electrode in a first direction parallel to a top of the substrate is greater than a second width of the variable resistance layer in the first direction or a third width of the selection device in the first direction. A capping layer is formed on at least one of a side wall of the etched side portion of the selection device or a side wall of the etched side portion of the variable resistance layer.

Memory device and method of manufacturing the same

A semiconductor memory device includes first conductive lines extending in a first direction on a substrate, second conductive lines extending in a second direction over the first conductive line, the first and the second conductive lines crossing each other at cross points, a cell structure positioned at each of the cross points, each of the cell structures having a data storage element, a selection element to apply a cell selection signal to the data storage element and to change a data state of the data storage element, and an electrode element having at least an electrode with a contact area smaller than that of the selection element, and an insulation pattern insulating the first and the second conductive lines and the cell structures from one another.

Semiconductor devices

A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.

Memory device

A variable resistance memory device includes a pattern of one or more first conductive lines, a pattern of one or more second conductive lines, and a memory structure between the first and second conductive lines. The pattern of first conductive lines extends in a first direction on a substrate, and the first conductive lines extend in a second direction crossing the first direction. The pattern of second conductive lines extends in the second direction on the first conductive lines, and the second conductive lines extend in the first direction. The memory structure vertically overlaps a first conductive line and a second conductive line. The memory structure includes an electrode structure, an insulation pattern on a central upper surface of the electrode structure, and a variable resistance pattern on an edge upper surface of the electrode structure. The variable resistance pattern at least partially covers a sidewall of the insulation pattern.

Variable resistance memory devices

A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below,[GeSeTe][X]&#x2003;&#x2003;(1)

Memory device including a variable resistance material layer

A variable resistance memory device including a selection pattern; an intermediate electrode contacting a first surface of the selection pattern; a variable resistance pattern on an opposite side of the intermediate electrode relative to the selection pattern; and a first electrode contacting a second surface of the selection pattern and including a n-type semiconductor material, the second surface of the selection pattern being opposite the first surface thereof.

A method of manufacturing a magnetoresistive random access memory device, the method including forming a memory structure on a substrate, the memory structure including a lower electrode, a magnetic tunnel junction structure, and an upper electrode sequentially stacked; forming a first capping layer to cover a surface of the memory structure by a deposition process using a plasma under first conditions; and forming a second capping layer on the first capping layer by a deposition process using a plasma under second conditions different from the first conditions.

Magnetoresistive random access memory device

A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below,[GeSi(AsTe)][N]&#x2003;&#x2003;(1)

Magnetoresistive random access memory device and method of manufacturing the same

A nonvolatile memory cell includes first and second interlayer insulating films which are separated from each other and are stacked sequentially, a first electrode which penetrates the first interlayer insulating film and the second interlayer insulating film, a resistance change film which is formed along a side surface of the first electrode and extends parallel to the first electrode, and a second electrode which is formed between the first interlayer insulating film and the second interlayer insulating film. The second electrode includes a conductive film which is made of metal and a diffusion preventing film which prevents diffusion of a conductive material contained in the conductive film.

Nonvolatile memory devices, nonvolatile memory cells and methods of manufacturing nonvolatile memory devices

A method of forming a phase change material layer pattern includes forming a phase change material layer partially filling an opening through an insulating interlayer. A plasma treatment process is performed on the phase change material layer to remove an oxide layer on a surface of the phase change material layer. A heat treatment process is performed on the phase change material layer to remove a void or a seam in the phase change material layer, sufficiently filling the opening.

Method of forming a phase change material layer pattern and method of manufacturing a phase change memory device

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Suwon-si, South Korea

Soon-Oh Park